GTS Transceiver PHY User Guide

ID 817660
Date 7/08/2024
Public
Document Table of Contents

3.6.3. Port Widths and Recommended Connections for tx/rx_coreclkin, tx/rx_clkout, and tx/rx_clkout2

Port Widths and Recommended Connections shows the port width and recommended connection for the following ports:

  • o_tx_clkout and o_rx_clkout
  • o_tx_clkout2 and o_rx_clkout2
  • i_tx_coreclkin and i_rx_coreclkin
Table 51.  Port Widths and Recommended ConnectionsRefer to for variable definitions.
PMA Width Port Width for tx_clkout, tx_clkout2, tx_coreclkin,rx_clkout, rx_clkout2, rx_coreclkin Recommended Connection
8, 10, 16, 20, 32 1 * N
  • Connect o_tx_clkout[0] or o_tx_clkout2[0] to i_tx_coreclkin[N-1:0]
  • Connect o_rx_clkout[0] or o_rx_clkout2[0] to i_rx_coreclkin[N-1:0]
Table 52.  Example with Number of PMA Lane = 1
PMA Width tx/rx_clkout/2 Port Width Recommended Connection
8, 10, 16, 20, 32 1
  • Connect o_tx_clkout or o_tx_clkout2 to i_tx_coreclkin
  • Connect o_rx_clkout or o_rx_clkout2 to i_rx_coreclkin
Table 53.  Example with Number of PMA Lanes = 4
PMA Width tx/rx_clkout/2 Port Width Recommended Connection
8, 10, 16, 20, 32 4
  • Connect o_tx_clkout[0] or o_tx_clkout2[0] to i_tx_coreclkin[3:0]
  • Connect o_rx_clkout[0] or o_rx_clkout2[0] to i_rx_coreclkin[3:0]