External Memory Interfaces (EMIF) IP User Guide: Agilex™ 5 FPGAs and SoCs

ID 817467
Date 7/08/2024
Public
Document Table of Contents

4.5.3. s0_axil for EMIF IP Calibration Component

Fabric (i.e. NOC-bypass) axilite interface to the IOSSM, including the EMIF mailbox and the calbus bridge

Table 72.  Interface: s0_axilInterface type: axi4lite
Port Name Direction Description
s0_axi4lite_awaddr input Write Address
s0_axi4lite_awvalid input Write Address Valid
s0_axi4lite_awready output Write Address Ready
s0_axi4lite_wdata input Write Data
s0_axi4lite_wstrb input Write Strobes
s0_axi4lite_wvalid input Write Valid
s0_axi4lite_wready output Write Ready
s0_axi4lite_bresp output Write Response
s0_axi4lite_bvalid output Write Response Valid
s0_axi4lite_bready input Response Ready
s0_axi4lite_araddr input Read Address
s0_axi4lite_arvalid input Read Address Valid
s0_axi4lite_arready output Read Address Ready
s0_axi4lite_rdata output Read Data
s0_axi4lite_rresp output Read Response
s0_axi4lite_rvalid output Read Valid
s0_axi4lite_rready input Read Ready
s0_axi4lite_awprot input Write Protection Type
s0_axi4lite_arprot input Read Protection Type