External Memory Interfaces (EMIF) IP User Guide: Agilex™ 5 FPGAs and SoCs

ID 817467
Date 7/08/2024
Public

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Document Table of Contents

8.1. Agilex 5 FPGA EMIF IP Parameter Descriptions for LPDDR4

The following topics describe the parameters available on each tab of the IP parameter editor, which you can use to configure your IP.