External Memory Interfaces (EMIF) IP User Guide: Agilex™ 5 FPGAs and SoCs

ID 817467
Date 7/08/2024
Public
Document Table of Contents

12.16. Determine Whether the Issue Exists in the Current Version of Software

Designs are often tested using previous generations of Altera software or IP.

Projects may not be upgraded for various reasons:

  • Multiple engineers are on the same project. To ensure compatibility, a common release of Altera software is used by all engineers for the duration of the product development. The design may be several releases behind the current Quartus® Prime software version.
  • Many companies delay before adopting a new release of software so that they can first monitor Internet forums to get a feel for how successful other users say the software is.
  • Many companies never use the latest version of any software, preferring to wait until the first service pack is released that fixes the primary issues.
  • Some users may only have a license for the older version of the software and can only use that version until their company makes the financial decision to upgrade.
  • The local interface specification from Altera FPGA IP to the customer's logic sometimes changes from software release to software release. If you have already spent resources designing interface logic, you may be reluctant to repeat this exercise. If a block of code is already signed off, you may be reluctant to modify it to upgrade to newer IP from Altera.

In all of the above scenarios, you must determine if the issue still exists in the latest version of the Altera software. Bug fixes and enhancements are added to the Altera FPGA IP every release. Depending on the nature of the bug or enhancement, it may not always be clearly documented in the release notes.

Finally, if the latest version of the software resolves the issue, it may be easier to debug the version of software that you are using.