Intel® Arria® 10 Hard Processor System Technical Reference Manual

ID 683711
Date 1/10/2023
Public

A newer version of this document is available. Customers should click here to go to the newest version.

Document Table of Contents

25.3.3. Watchdog Timer Clocks

Each watchdog timer is connected to the l4_sys_free_clk clock so that timer operation is not dependent on the phase-locked loops (PLLs) in the clock manager and so that it is always running. This independence allows recovery from software that inadvertently programs the PLLs in the clock manager incorrectly.

Table 225.  Watchdog Timer Clocks
Timer System Clock
watchdog0 l4_sys_free_clk
watchdog1 l4_sys_free_clk