Intel® Arria® 10 Hard Processor System Technical Reference Manual
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Ixiasoft
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Ixiasoft
29.2.3. AXI Bridge FPGA Interface Clocks
The AXI interface has an asynchronous clock crossing in the FPGA-to-HPS bridge. The FPGA-to-HPS and HPS-to-FPGA interfaces are synchronized to clocks generated in the FPGA fabric. These interfaces can be asynchronous to one another.
- f2h_axi_clock—AXI slave clock for FPGA-to-HPS bridge, generated in FPGA fabric
- h2f_axi_clock—AXI master clock for HPS-to-FPGA bridge, generated in FPGA fabric
- h2f_lw_axi_clock—AXI master clock for lightweight HPS-to-FPGA bridge, generated in FPGA fabric