Intel® Arria® 10 Hard Processor System Technical Reference Manual

ID 683711
Date 1/10/2023
Public

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22.3.2. FPGA Routing

There are two UARTs provided in the HPS. Both sets of UART signals can be routed to the FPGA. For more information on routing UART signals to the FPGA, refer to the HPS Component Interfaces chapter.

Table 221.  Signals for FPGA Routing

Signal

Width

Direction

Description

uart_rxd

1 bit

Input

Serial input

uart_txd

1 bit

Output

Serial output

uart_cts

1 bit

Input

Clear to send

uart_rts

1 bit

Output

Request to send

uart_dsr

1 bit

Input

Data set ready

uart_dcd

1 bit

Input

Data carrier detect

uart_ri

1 bit

Input

Ring indicator

uart_dtr

1 bit

Output

Data terminal ready

uart_out1_n

1 bit

Output

User defined output 1

uart_out2_n

1 bit

Output

User defined output 2