Intel® Arria® 10 Hard Processor System Technical Reference Manual

ID 683711
Date 1/10/2023
Public

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17.3.1. Peripheral Request Interface

You can enable each direct memory access (DMA) controller peripheral request interface, individually. Setting each of the eight peripheral request IDs enables or disables a peripheral request interface. When set to enable, it allows for FPGA soft logic to request a DMA transfer. For DMA transfers to or from the FPGA, this feature is only necessary if your design requires transfer flow control.

The DMA peripheral request interface communicates with peripherals by either the Arm* protocol or the Synopsys* protocol.

  • Arm* Protocol -

    For peripherals using the Arm* protocol, clock-crossing logic is the only logic between the DMA and the peripheral.

  • Synopsys* Protocol Overview -

    The Synopsys* protocol is used for the hardware flow control that is not the same as the protocol used by the DMA-330 core.

    For peripherals using the Synopsys* protocol, clock-crossing logic and protocol adaptation logic exist between the DMA and the peripheral.

The following figure shows that the peripheral request interface consists of a peripheral request bus and a DMAC acknowledge bus that use the prefixes:

  • dr—The peripheral request bus
  • da—The DMAC acknowledge bus
Figure 84. Request and Acknowledge Buses on the Peripheral Request Interface

Both buses use the valid and ready handshake that the AXI protocol describes.

The peripheral uses drtype[1:0] to either:

  • Request a single transfer
  • Request a burst transfer
  • Acknowledge a flush request

The peripheral uses drlast to notify the DMAC that the request on drtype[1:0] is the last request of the DMA transfer sequence. drlast is transferred at the same time as drtype[1:0].

The DMAC can indicate the following using datype[1:0]:

  • When it completes the requested single transfer
  • When it completes the requested burst transfer
  • When it issues a flush request
Note: If you configure the DMAC to provide more than one peripheral request interface, each interface is assigned a unique identifier, _<x> where <x> represents the number of the interface.
For the Synopsys* protocol, the following signals are used in the handshaking protocol:
  • dma_tx_req_n
  • dma_rx_req_n
  • dma_tx_ack_n
  • dma_rx_ack_n
  • dma_tx_single_n
  • dma_rx_single_n