Intel® Arria® 10 Hard Processor System Technical Reference Manual

ID 683711
Date 1/10/2023
Public

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26.3.4.2. Dedicated Configuration Registers

Configuration registers for each dedicated I/O pin allow software to control the corresponding I/O cell. These registers, configuration_dedicated_io_1 through configuration_dedicated_io_17, allow software to set the following characteristics:

  • Termination
  • Slew rate
  • Input buffer settings

These registers are not affected by a warm reset.

One configuration register, configuration_dedicated_io_bank, is also provided to select the I/O voltage for the dedicated I/O bank. At cold reset this register defaults to 0x2 (2.5-3.0 volt operation). This register is not affected by a warm reset.

Typically, the boot code programs this register when the system boots up. The boot code reads the BOOTSEL0, BOOTSEL1, and BOOTSEL2 pins and then sets the dedicated I/O bank to either 1.8 or 2.5-3.0 volt operation, depending on the pin status.

Note: Although the dedicated I/O pins are configured through the control registers, Intel recommends against reconfiguring the dedicated I/O pins after I/O configuration is complete.