Intel® Agilex™ Hard Processor System Technical Reference Manual

ID 683567
Date 11/11/2022
Public

A newer version of this document is available. Customers should click here to go to the newest version.

Document Table of Contents

6.4. System Interconnect Address Spaces

The system interconnect supports multiple address spaces.

Each address space uses some or all of a 1 TB address range. Depending on the configuration, different address spaces are visible in different regions for each master.

There are several address spaces that overlap each other, giving masters access to common space such as shared memory or CSRs. Within a given address map, the space is contiguous and non-overlapping. No peripheral mappings overlap makes it unnecessary to segment the space.