Intel® Agilex™ Hard Processor System Technical Reference Manual

ID 683567
Date 11/11/2022
Public

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22.2. GPIO Interface Block Diagram and System Integration

The figure below shows a block diagram of the GPIO interface. The following table shows a pin table of the GPIO interface:

Figure 124.  Intel® Agilex™ SoC GPIO
Table 210.  GPIO Interface pin table
Pin Name Mapped to GPIO Signal Name Comments
HPS_DEDICATED_Q1 [12:1] GPIO 0 [11:0] Input / Output
HPS_DEDICATED_Q2 [12:1] GPIO 0 [23:12] Input / Output
HPS_DEDICATED_Q3 [12:1] GPIO 1 [11:0] Input / Output
HPS_DEDICATED_Q4 [12:1] GPIO 1 [23:12] Input / Output