Intel® Agilex™ Hard Processor System Technical Reference Manual

ID 683567
Date 11/11/2022
Public

A newer version of this document is available. Customers should click here to go to the newest version.

Document Table of Contents

16.4.3.1.1. Load Command Parameters

Commands or responses are loaded in the command path in the following situations:
  • New command from BIU—When the BIU sends a new command to the CIU, the start_cmd bit is set to 1 in the cmd register.
  • Internally‑generated send_auto_stop—When the data path ends, the SD/SDIO STOP command request is loaded.
  • Interrupt request (IRQ) response with relative card address (RCA) 0x000—When the command path is waiting for an IRQ response from the MMC and a “send irq response” request is signaled by the BIU, the send IRQ request bit (send_irq_response) is set to 1 in the ctrl register.

Loading a new command from the BIU in the command path depends on the following cmd register bit settings:

  • update_clock_registers_only—If this bit is set to 1 in the cmd register, the command path updates only the clkena, clkdiv, and clksrc registers. If this bit is set to 0, the command path loads the cmd, cmdarg, and tmout registers. It then processes the new command, which is sent to the card.
  • wait_prvdata_complete—If this bit is set to 1, the command path loads the new command under one of the following conditions:
    • Immediately, if the data path is free (that is, there is no data transfer in progress), or if an open‑ended data transfer is in progress (bytcnt = 0).
    • After completion of the current data transfer, if a predefined data transfer is in progress.