Intel® Agilex™ Hard Processor System Technical Reference Manual

ID 683567
Date 11/11/2022
Public

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8. DMA Controller

This chapter describes the direct memory access controller (DMAC) contained in the hard processor system (HPS). The DMAC transfers data between memory and peripherals and other memory locations in the system. The DMA controller is an instance of the ARM® CoreLink* DMA Controller (DMA–330), Revision r1p2_rel.

  • Microcoded to support flexible transfer types
  • Supports up to eight channels
  • Provides 8-, 16-, 32-, and 64-bit transfer support
  • Supports flow control with 32 peripheral request interfaces