Intel® Agilex™ Hard Processor System Technical Reference Manual

ID 683567
Date 11/11/2022
Public

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Document Table of Contents

15.4.8.3.2. MAP10 Operations

Table 114.  MAP10 Operations

Command

Function

0x01

Sets block address for erase and initiates operation

0x10

Sets unlock start address

0x11

Sets unlock end address and initiates unlock

0x21

Initiates a lock of all blocks

0x31

Initiates a lock‑tight of all blocks

0x41

Sets up for spare area access

0x42

Sets up for default area access

0x43

Sets up for main+spare area access

0x60

Loads page to the buffer for a RMW operation

0x61

Sets the destination address for the page buffer in RMW operation

0x62

Writes the page buffer for a RMW operation

0x1000

Sets copy source address

0x11<PP>

Sets copy destination address and initiates a copy of <PP> pages

0x20<PP>

Sets up a pipeline read‑ahead of <PP> pages

0x21<PP>

Sets up a pipeline write of <PP> pages