Intel® Agilex™ Hard Processor System Technical Reference Manual

ID 683567
Date 11/11/2022
Public

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16.4.3.1.4. Driving P-bit to the CMD Pin

The command path drives a one‑cycle pull‑up bit (P‑bit) to 1 on the CMD pin between two commands if a response is not expected. If a response is expected, the P‑bit is driven after the response is received and before the start of the next command. While accessing a CE‑ATA card device, for commands that expect a CCS, the P‑bit is driven after the response only if the interrupts are disabled in the CE‑ATA card (the nIEN bit is set to 1 in the ATA control register), that is, the CCS expected bit (ccs_expected) in the cmd register is set to 0. If the command expects the CCS, the P‑bit is driven only after receiving the CCS.