Agilex™ 7 FPGAs and SoC FPGAs Package, Pinout, and PCB Design User Guide

ID 814028
Date 6/07/2024
Public
Document Table of Contents

6.4. Transceivers

Prior to the board development, a Channel Operating Margin (COM) analysis should be done to obtain an overall figure of merit for the end-to-end channel expressed in dB. Post Layout, repeat analysis and simulations based on the board’s parameters to confirm its loss is under the budget allocated for the board.