Agilex™ 7 FPGAs and SoC FPGAs Package, Pinout, and PCB Design User Guide

ID 814028
Date 6/07/2024
Public
Document Table of Contents

6.7. FPGA Configuration

Agilex™ 7 devices support configuration using the following interfaces: Avalon® streaming, JTAG, Configuration via Protocol (CvP), and Active Serial (AS) normal and fast modes. The Agilex™ 7 Configuration User Guide explains the configuration process, the device pins required for configuration, the available configuration schemes, remote system updates, and debugging. This document also provides an overview of the secure device manager (SDM) which manages security for the configuration bitstream.