Agilex™ 7 FPGAs and SoC FPGAs Package, Pinout, and PCB Design User Guide

ID 814028
Date 6/07/2024
Public
Document Table of Contents

2.3. Series/Package/Tile Comparison Table

Agilex™ 7 F-Series feature up to four transceiver tiles, I-Series feature up to six transceiver tiles, while the M-Series features four transceiver tiles and up to two HBM2e tiles. A variety of packages are offered. Dimensions shown are nominal.

Table 2.  Package and Tile Plan
Series Package Code Size (mm x mm) Pin/Ball Count Tile x Quantity
F-Series R24D 45 x 42 2340 F x1
R16A 37.5 x 34 1546 F x2
R24C 45 x 42 2340 F x2
R31C 56 x 45 3184 F x4
R24B 55 x 42.5 2486 P x1, E x1
R25A 52.5 x 40.5 2581 P x2, E x1
I-Series R18A 42.5 x 42.5 1805 R x1, F x1
R29A/D 56 x 45 2957 R x3, F x1
R31A 56 x 45 3184 R x1, F x3
R31B 56 x 45 3184 F x4
R39A 56 x 56 3984 F x6
M-Series R31B 56 x 45 3184 F x4
R47A 56 x 66 4700 F x3, R x1, HBM2e x2
R47B 56 x 66 4700 F x4, HBM2e x2