Agilex™ 7 FPGAs and SoC FPGAs Package, Pinout, and PCB Design User Guide

ID 814028
Date 6/07/2024
Public
Document Table of Contents

5.3. I/O Banks

Agilex™ 7 Device I/O and LVDS SERDES Interface information for F-Series, I-Series, and M-Series are covered in the user guides listed in the following tables. Electrical characteristics are listed in the respective device data sheets.

Table 16.  For Agilex™ 7 F-Series and I-Series Devices
Document Title Document Number
Agilex™ 7 General-Purpose I/O User Guide: F-Series and I-Series 683780
Agilex™ 7 LVDS SERDES User Guide: F-Series and I-Series 721819
Agilex™ 7 FPGAs and SoCs Device Data Sheet: F-Series and I-Series 683301
Agilex™ 7 Device Family High-Speed Serial Interface Signal Integrity Design Guidelines

(refer to the PCB Design Guidelines section)

683864

Table 17.  For Agilex™ 7 M-Series Devices
Document Title Document Number
Agilex™ 7 General-Purpose I/O User Guide: M-Series 772138
Agilex™ 7 LVDS SERDES User Guide: M-Series 768615
Agilex™ 7 FPGAs and SoCs Device Data Sheet: M-Series 769310
Agilex™ 7 Device Family High-Speed Serial Interface Signal Integrity Design Guidelines

(refer to the PCB Design Guidelines section)

683864