Agilex™ 7 FPGAs and SoC FPGAs Package, Pinout, and PCB Design User Guide

ID 814028
Date 6/07/2024
Public
Document Table of Contents

6.5. SoC FPGA Hard Processor Systems (HPS)

Refer to AN 886: Agilex™ 7 Device Design Guidelines to review for the HPS include the JTAG Interface options, and the two trace interfaces.