Agilex™ 7 FPGAs and SoC FPGAs Package, Pinout, and PCB Design User Guide

ID 814028
Date 6/07/2024
Public
Document Table of Contents

5.1. Pin Connection Guidelines

The Pin Connection Guidelines describes the available device pins and provides connection guidelines for each pin. Core pins, tile pins, and Hard Processor System (HPS) pins are listed and defined in table format, with columns consisting of Pin Name, Pin Function, Pin Description, and Connection Recommendations. Power supply sharing examples are also provided. These documents are available in HTML and PDF formats.