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1. Introduction
2. Product Family Plan
3. Package Information
4. Thermal Design Considerations
5. Pin Connection Guidelines and Pinouts
6. Printed Circuit Board (PCB) Design
7. Signal Integrity Simulations
8. Validation
9. Document Revision History for the Agilex™ 7 FPGAs and SoC FPGAs Package, Pinout, and PCB Design User Guide
2.5.1. Agilex™ 7 F-Series Devices with F-Tiles
2.5.2. Agilex™ 7 F-Series Devices with E-Tile and P-Tiles
2.5.3. Agilex™ 7 I-Series Devices with F-Tiles
2.5.4. Agilex™ 7 I-Series Devices with F-Tiles and R-Tiles
2.5.5. Agilex™ 7 M-Series Devices with HBM2e
2.5.6. Agilex™ 7 M-Series Devices without HBM2e
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7.3. IBIS Models
IBIS models consist of the following resources:
- A listing of available models in table format with I/O standard and configurable settings.
Note: The two assets available are F-Series and I-Series List, and a M-Series List.
- A ZIP file of the actual available IBIS Models. A click to accept (CTA) license is required to access.
Note: The two assets available are F-Series and I-Series ZIP File, and a M-Series ZIP File.
- A XLSX file that provides the RLC (resistance, inductance, and capacitance) values by pin type and with MIN, TYP, and MAX values vs Part Number. A click to accept (CTA) license is required to access.
Note: The two assets available are F-Series and I-Series XLSX File, and a M-Series XLSX File.
To view all available IBIS Resources, visit the Agilex™ 7 Product Support Collection: