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Ixiasoft
HSIO Single-Ended I/O Standards Specifications
HSIO Single-Ended SSTL, HSTL, HSUL, and POD I/O Reference Voltage Specifications
HSIO Single-Ended SSTL, HSTL, HSUL, and POD I/O Standards Signal Specifications
HSIO Single-Ended LVSTL I/O Standards Specifications
HSIO Differential SSTL, HSTL, and HSUL I/O Standards Specifications
HSIO Differential POD I/O Standards Specifications
HSIO Differential LVSTL I/O Standards Specifications
HSIO Differential I/O Standards Specifications
MIPI D-PHY I/O Standards Specifications
HPS Clock Performance
HPS Internal Oscillator Frequency
HPS PLL Specifications
HPS Cold Reset
HPS SPI Timing Characteristics
HPS SD/eMMC Timing Characteristics
HPS USB 2.0 Timing Characteristics
HPS USB 3.1 Timing Characteristics
HPS Ethernet Media Access Controller (EMAC) Timing Characteristics
HPS I2C Timing Characteristics
HPS I3C Timing Characteristics
HPS NAND Timing Characteristics
HPS Trace Timing Characteristics
HPS GPIO Interface
HPS JTAG Timing Characteristics
HPS Programmable I/O Timing Characteristics
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Ixiasoft
HSIO OCT Without Calibration Resistance Tolerance Specifications
Symbol | Description | Condition (V) | Calibration Accuracy | Unit |
---|---|---|---|---|
34-Ω and 40-Ω RS | Internal series termination without calibration (34-Ω and 40-Ω setting) | 1.3 V LVCMOS I/O standard | 30 | % |
34-Ω and 40-Ω RS 57 | Internal series termination without calibration (34-Ω and 40-Ω setting) | 1.2 V LVCMOS, SSTL-12, HSTL-12, HSUL-12, and POD12 I/O standards | 25 | % |
34-Ω and 40-Ω RS 57 | Internal series termination without calibration (34-Ω and 40-Ω setting) | 1.1 V LVCMOS, POD11, and LVSTL11 I/O standards | 25 | % |
34-Ω and 40-Ω RS 57 | Internal series termination without calibration (34-Ω and 40-Ω setting) | 1.05 V LVCMOS and LVSTL105 I/O standards | 25 | % |
34-Ω and 40-Ω RS | Internal series termination without calibration (34-Ω and 40-Ω setting) | 1.0 V LVCMOS I/O standard | 30 | % |
50-Ω RT 57 | Internal parallel termination without calibration (50-Ω setting) | SSTL-12 and HSTL-12 I/O standards | 25 | % |
POD11 and POD12 I/O standards | 25 | % | ||
LVSTL11 and LVSTL105 I/O standards | 25 | % | ||
100-Ω RD 58 | Internal differential termination (100-Ω setting) | True differential signaling I/O standard at VCCIO_PIO = 1.05 | 40 | % |
True differential signaling I/O standard at VCCIO_PIO = 1.1 | 40 | % | ||
True differential signaling I/O standard at VCCIO_PIO = 1.2 | 40 | % | ||
True differential signaling I/O standard at VCCIO_PIO = 1.3 | 40 | % |
57 This specification applies to both single-ended and pseudo-differential I/O buffers.
58 This specification applies to VICM(DC) ≤ 1.3V. For VICM(DC) > 1.3V, a specification range of -60% to +40% applies.