Agilex™ 5 FPGAs and SoCs Device Data Sheet

ID 813918
Date 8/05/2024
Public
Document Table of Contents

HPS and SDM I/O Internal Weak Pull-Up and Weak Pull-Down Resistor

The I/O pins in SDM and HPS bank are supported with weak pull-up and weak pull-down options. For SDM I/O pins, the weak pull-up and weak pull-down features are pre-configured according to the configuration mode.

Table 29.  HPS and SDM I/O Internal Weak Pull-Up and Weak Pull-Down Resistor For specification status, see the Data Sheet Status table
Symbol Description Condition (V) Min Typ Max Unit
20 kΩ RPU, 20 kΩ RPD Value of the I/O pin pull-up and pull-down resistor during user mode if you have enabled the programmable pull-up or pull-down resistor option. VCCIO_SDM = 1.8 ±5%, VCCIO_HPS = 1.8 ±5% 15 20 25
50 kΩ RPU, 50 kΩ RPD Value of the I/O pin pull-up and pull-down resistor during user mode if you have enabled the programmable pull-up or pull-down resistor option. VCCIO_SDM = 1.8 ±5%, VCCIO_HPS = 1.8 ±5% 37.5 50 62.5
80 kΩ RPU, 80 kΩ RPD Value of the I/O pin pull-up and pull-down resistor during user mode if you have enabled the programmable pull-up or pull-down resistor option. VCCIO_SDM = 1.8 ±5%, VCCIO_HPS = 1.8 ±5% 60 80 100