Intel® Agilex™ Hard Processor System Technical Reference Manual

ID 683567
Date 2/14/2023
Public

A newer version of this document is available. Customers should click here to go to the newest version.

Document Table of Contents

2.2.10.2. USB Controllers

The HPS provides two USB 2.0 Hi-Speed On-the-Go (OTG) controllers from Synopsys® DesignWare*. The USB controller signals cannot be routed to the FPGA like those of other peripherals; instead they are routed to the dedicated I/O.

Each of the USB controllers offers the following features:

  • Complies with the following specifications:
    • USB OTG Revision 1.3
    • USB OTG Revision 2.0
    • Embedded Host Supplement to the USB Revision 2.0 Specification
  • Supports software-configurable modes of operation between OTG 1.3 and OTG 2.0
  • Supports all USB 2.0 speeds:
    • High speed (HS, 480-Mbps)
    • Full speed (FS, 12-Mbps)
    • Low speed (LS, 1.5-Mbps)
      Note: In host mode, all speeds are supported; however, in device mode, only high speed and full speed are supported.
  • Local buffering with Error Correction Code (ECC) support
    Note:
    The USB 2.0 OTG controller does not support the following interface standards:
    • Enhanced Host Controller Interface (EHCI)
    • Open Host Controller Interface (OHCI)
    • Universal Host Controller Interface (UHCI)
  • Supports USB 2.0 Transceiver Macrocell Interface Plus (UTMI+) Low Pin Interface (ULPI) PHYs (SDR mode only)
  • Supports up to 16 bidirectional endpoints, including control endpoint 0
    Note: Only seven periodic device IN endpoints are supported.
  • Supports up to 16 host channels
    Note: In host mode, when the number of device endpoints is greater than the number of host channels, software can reprogram the channels to support up to 127 devices, each having 32 endpoints (IN + OUT), for a maximum of 4,064 endpoints.
  • Supports generic root hub
  • Supports automatic ping capability