Intel® Agilex™ Hard Processor System Technical Reference Manual

ID 683567
Date 2/14/2023
Public

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17.6.2.5.2. TX DMA Operation: OSF Mode

While in the Run state, the transmit process can simultaneously acquire two frames without closing the Status descriptor of the first [if Bit 2 (OSF) in Register 6 (Operation Mode Register) is set]. As the transmit process finishes transferring the first frame, it immediately polls the transmit descriptor list for the second frame. If the second frame is valid, the transmit process transfers this frame before writing the first frame’s status information. 

In OSF mode, the Run state transmit DMA operates in the following sequence: 

  1. The DMA operates as described in steps 1 - 6 of the "TX DMA Operation: Default (Non-OSF) Mode" section.
  2. Without closing the previous frame’s last descriptor, the DMA fetches the next descriptor. 
  3. If the DMA owns the acquired descriptor, the DMA decodes the transmit buffer address in this descriptor. If the DMA does not own the descriptor, the DMA goes into Suspend mode and skips to 7.
  4. The DMA fetches the transmit frame from the Host memory and transfers the frame to the MTL until the End‑of‑frame data is transferred, closing the intermediate descriptors if this frame is split across multiple descriptors. 
  5. The DMA waits for the previous frame’s frame transmission status and timestamp. Once the status is available, the DMA writes the timestamp to TDES2 and TDES3, if such timestamp was captured (as indicated by a status bit). The DMA then writes the status, with a cleared Own bit, to the corresponding TDES0, thus closing the descriptor. If timestamping was not enabled for the previous frame, the DMA does not alter the contents of TDES2 and TDES3. 
  6. If enabled, the transmit interrupt is set, the DMA fetches the next descriptor, then proceeds to 3 (when Status is normal). If the previous transmission status shows an underflow error, the DMA goes into Suspend mode (7). 
  7. In Suspend mode, if a pending status and timestamp are received from the MTL, the DMA writes the timestamp (if enabled for the current frame) to TDES2 and TDES3, then writes the status to the corresponding TDES0. It then sets relevant interrupts and returns to Suspend mode. 
  8. The DMA can exit Suspend mode and enter the Run state (go to 1 or 2 depending on pending status) only after receiving a Transmit Poll demand (Register 1 (Transmit Poll Demand Register). 
Note: As the DMA fetches the next descriptor in advance before closing the current descriptor, the descriptor chain should have more than two different descriptors for correct and proper operation. 
Figure 69. TX DMA Operation in OSF Mode