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1. Overview
2. Install and License the GTS Ethernet Intel® FPGA Hard IP
3. Configure and Generate Ethernet Hard IP variant
4. Integrate GTS Ethernet Intel® FPGA Hard IP into Your Application
5. Simulate, Compile, and Validate (MAC+PCS) - Single Instance
6. Simulate, Compile, and Validate (MII PCS Only /PCS66 OTN/PCS66 FlexE) - Single Instance
7. Simulate, Compile, and Validate SyncE - Single Instance
8. Simulate and Compile PTP1588 - Single Instance
9. Simulate, Compile, and Validate - Multiple Instance
10. Simulate, Compile, and Validate - Auto-Negotiation and Link Training
11. Troubleshoot and Diagnose Issues
A. Appendix A: Functional Description
B. Appendix B: Configuration Registers
C. Appendix C: Document Revision History for the GTS Ethernet Intel® FPGA Hard IP User Guide
4.1. Implement Required Clocking
4.2. Implement Required Resets
4.3. Connect the Status Interface
4.4. Connect the MAC Avalon Streaming Client Interface
4.5. Connect the MII PCS Only Client Interface
4.6. Connect the PCS66 Client Interface – FlexE and OTN
4.7. Connect the Precision Time Protocol Interface
4.8. Connect the Ethernet Hard IP Reconfiguration Interface
4.9. Connect the Auto-Negotiation and Link Training
4.1.1. Implement MAC Synchronous Clock Connections to Single Instance
4.1.2. Implement MAC Synchronous Clock Connections to Multiple Instances
4.1.3. Implement Clock Connections to MAC Asynchronous Operation
4.1.4. Implement Clock Connections in Synchronous Ethernet Operation (Sync-E)
4.1.5. Implement Clock Connections in PTP-Based Design
4.4.1.1. Drive the Ethernet Packet to the TX MAC Avalon Streaming Client Interface with Disabled Preamble Passthrough
4.4.1.2. Drive the Ethernet Packet on the TX MAC Avalon Streaming Client Interface with Enabled Preamble Passthrough
4.4.1.3. Use i_tx_skip_crc to Control Source Address, PAD, and CRC Insertion
4.4.1.4. Assert the i_tx_error to Invalidate a Packet
4.4.2.1. Receive Ethernet Frame on the RX MAC Avalon Streaming Client Interface with Preamble Passthrough Disabled
4.4.2.2. Receive Ethernet Frame with Preamble Passthrough Enabled
4.4.2.3. Receive Ethernet Frame with Remove CRC bytes Disabled
4.4.2.4. Monitor Status and Errors on the RX MAC Avalon Streaming Client Interface
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A.4.3.1. Adjust TX UI
- Request snapshot of initial TX TAM:
csr_write (ptp_uim_tam_snapshot.tx_tam_snapshot, 1’b1)
- Read snapshotted initial TAM and counter values:
tx_tam_0_31_0 = csr_read (ptp_tx_uim_tam_info0.tam_31_0[31:0]) tx_tam_0_47_32 = csr_read (ptp_tx_uim_tam_info1.tam_47_32[15:0]) tx_tam_0_cnt = csr_read (ptp_tx_uim_tam_info1.tam_cnt[30:16]) tx_tam_0_valid = csr_read (ptp_tx_uim_tam_info1.tam_valid[31])
- If tx_tam_0_valid = 1, complete TAM by concatenating the initial TAM values:
tx_tam_0 = {tx_tam_0_47_32, tx_tam_0_31_0};
- If tx_tam_0_valid = 0, restart from Step1.
- If tx_tam_0_valid = 1, complete TAM by concatenating the initial TAM values:
- Starting from the time when step 1 is executed, wait for time duration as specified in section Minimum and Maximum Reference Time (TAM) Interval for UI Measurement (Hardware).
- Request snapshot of Nth TX TAM:
csr_write (ptp_uim_tam_snapshot.tx_tam_snapshot, 1’b1)
- Read snapshotted Nth TAM and counter values:
tx_tam_n_31_0 = csr_read (ptp_tx_uim_info0.tam_31_0[31:0]) tx_tam_n_47_32 = csr_read (ptp_tx_uim_tam_info1.tam_47_32[15:0]) tx_tam_n_cnt = csr_read (ptp_tx_uim_tam_info1.tam_cnt[30:16]) tx_tam_n_valid = csr_read (ptp_tx_uim_tam_info1.tam_valid[31])
Form the TAM by concatenating snapshotted Nth TAM values:tx_tam_n = {tx_tam_n_47_32, tx_tam_n_31_0};
- Check if there was a large change to TOD value impacting TAM value:
tx_tam_n_valid = csr_read (ptp_tx_uim_tam_info1.tam_valid[31])
If tx_tam_n_valid = 0, restart from Step 1. If you used tx_tam_n as tx_tam_0 and tx_tam_n_cnt as tx_tam_0_cnt, you can skip Steps 1 and 2. Then, you can start the wait time in Step 3 when the Step 4 executes.
- Calculation:
- Get TAM interval:
tx_tam_interval = <Refer to Reference Time Interval> tx_tam_interval_per_pl = tx_tam_interval / PL
- Calculate time elapsed:
tx_tam_delta = (tx_tam_n <= tx_tam_0) ? [(tx_tam_n + 10^9 ns) – tx_tam_0] : (tx_tam_n – tx_tam_0)
Per Step 3, tx_tam_0 and tx_tam_n difference must be within the expected time range.- If tx_tam_delta (in ms) is lesser that the minimum time value specified by Time (ms) column of Table: Table 63, discard the result and restart from step 3.
- If tx_tam_delta (in ms) is greater than the maximum value specified by Time (ms) column of Table: Table 63, discard the result and restart from step 1.
Note: 10^9 ns = 48’h 3B9A_CA00_0000 - Calculate TAM count value:
tx_tam_cnt = (tx_tam_n_cnt < tx_tam_0_cnt) ? [(tx_tam_n_cnt + 2^15) – tx_tam_0_cnt] : (tx_tam_n_cnt – tx_tam_0_cnt)
Per Step 3, tx_tam_0 and tx_tam_n difference must be within the expected time range.- If tx_tam_cnt (in ms) is lesser that the minimum time value specified by Number of Count column of Table: Table 63, discard the result and restart from step 3.
- If tx_tam_cnt (in ms) is greater than the maximum value specified by Number of Count column of Table: Table 63, discard the result and restart from step 1.
- Calculate UI value:
tx_ui = (tx_tam_delta) / (tx_tam_cnt * tx_tam_interval_per_pl)
- Get TAM interval:
- Write the calculated UI value to IP:
csr_write (tx_ptp_ui, tx_ui)
Ensure the format is {4-bit nanoseconds, 28-bit fractional nanoseconds}.
- After first UI measurement, for every minimum TAM interval or longer duration, repeat step 1 to 8. This is to prevent time counter drift from golden TOD in the system whenever clock PPM changes.
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