Stratix® 10 Clocking and PLL User Guide

ID 683195
Date 7/11/2024
Public
Document Table of Contents

4.3.2. Implementing I/O PLL Reconfiguration in the IOPLL Reconfig IP Core

You can enable the PLL reconfiguration circuitry for the I/O PLL through the Avalon® -MM interface in the IOPLL Reconfig IP core.