Triple-Speed Ethernet Intel® FPGA IP User Guide: Agilex™ 5 FPGAs and SoCs

ID 813669
Date 7/08/2024
Public
Document Table of Contents

4.1.4.9. IP Payload Alignment

The network stack makes frequent use of the IP addresses stored in Ethernet frames. When you turn on the Align packet headers to 32-bit boundaries option, the MAC function aligns the IP payload on a 32-bit boundary by adding two bytes to the beginning of Ethernet frames. The padding of Ethernet frames are determined by the registers tx_cmd_stat and rx_cmd_stat on transmit and receive, respectively.
Table 16.  32-Bit Interface Data Structure — Non-IP Aligned Ethernet Frame
Bits
31...24 23...16 15...8 7...0
Byte 0 Byte 1 Byte 2 Byte 3
Byte 4 Byte 5 Byte 6 Byte 7
Table 17.  32-Bit Interface Data Structure — IP Aligned Ethernet Frame
Bits
31...24 23...16 15...8 7...0
padded with zeros Byte 0 Byte 1
Byte 2 Byte 3 Byte 4 Byte 5