Triple-Speed Ethernet Intel® FPGA IP User Guide: Agilex™ 5 FPGAs and SoCs

ID 813669
Date 7/08/2024
Public
Document Table of Contents

6.2.2. Avalon Streaming Transmit Interface

Figure 49. Transmit Operation—MAC With Internal FIFO Buffers


Figure 50. Transmit Operation—MAC Without Internal FIFO Buffers