Cache_Coherency_Unit Address Map

Registers in NoC accessible through regbus

Module Instance	Base Address	End Address
`i_ccu_noc_registers`	`0xF7000000`	`0xF7049E5F`

Register	Offset	Width	Access	Reset Value	Description
`bridge_ccc0_mprt_6_81_am_adbase_mem_ios_sprt_iospace0a_0`	`0x00038400`	`64`	`RW`	`0x0000000080000000`	ccc0_mprt register am_adbase_mem_ios_sprt_iospace0a_0
`bridge_ccc0_mprt_6_81_am_adbase_mem_ios_sprt_iospace0b_0`	`0x00038420`	`64`	`RW`	`0x00000000C0000000`	ccc0_mprt register am_adbase_mem_ios_sprt_iospace0b_0
`bridge_ccc0_mprt_6_81_am_adbase_mem_ios_sprt_iospace1a_0`	`0x00038440`	`64`	`RW`	`0x00000000F9000000`	ccc0_mprt register am_adbase_mem_ios_sprt_iospace1a_0
`bridge_ccc0_mprt_6_81_am_adbase_mem_ios_sprt_iospace1b_0`	`0x00038460`	`64`	`RW`	`0x00000000FA000000`	ccc0_mprt register am_adbase_mem_ios_sprt_iospace1b_0
`bridge_ccc0_mprt_6_81_am_adbase_mem_ios_sprt_iospace1c_0`	`0x00038480`	`64`	`RW`	`0x00000000FC000000`	ccc0_mprt register am_adbase_mem_ios_sprt_iospace1c_0
`bridge_ccc0_mprt_6_81_am_adbase_mem_ios_sprt_iospace1d_0`	`0x000384A0`	`64`	`RW`	`0x00000000FE000000`	ccc0_mprt register am_adbase_mem_ios_sprt_iospace1d_0
`bridge_ccc0_mprt_6_81_am_adbase_mem_ios_sprt_iospace1e_0`	`0x000384C0`	`64`	`RW`	`0x00000000FF000000`	ccc0_mprt register am_adbase_mem_ios_sprt_iospace1e_0
`bridge_ccc0_mprt_6_81_am_adbase_mem_ios_sprt_iospace1f_0`	`0x000384E0`	`64`	`RW`	`0x00000000FF800000`	ccc0_mprt register am_adbase_mem_ios_sprt_iospace1f_0
`bridge_ccc0_mprt_6_81_am_adbase_mem_ios_sprt_iospace1g_0`	`0x00038500`	`64`	`RW`	`0x00000000FFC00000`	ccc0_mprt register am_adbase_mem_ios_sprt_iospace1g_0
`bridge_ccc0_mprt_6_81_am_adbase_mem_mem0_sprt_memspace0_0`	`0x00038520`	`64`	`RW`	`0x0000000000000000`	ccc0_mprt register am_adbase_mem_mem0_sprt_memspace0_0
`bridge_ccc0_mprt_6_81_am_adbase_mem_mem0_sprt_memspace1a_0`	`0x00038540`	`64`	`RW`	`0x0000000100000000`	ccc0_mprt register am_adbase_mem_mem0_sprt_memspace1a_0
`bridge_ccc0_mprt_6_81_am_adbase_mem_mem0_sprt_memspace1b_0`	`0x00038560`	`64`	`RW`	`0x0000000200000000`	ccc0_mprt register am_adbase_mem_mem0_sprt_memspace1b_0
`bridge_ccc0_mprt_6_81_am_adbase_mem_mem0_sprt_memspace1c_0`	`0x00038580`	`64`	`RW`	`0x0000000400000000`	ccc0_mprt register am_adbase_mem_mem0_sprt_memspace1c_0
`bridge_ccc0_mprt_6_81_am_adbase_mem_mem0_sprt_memspace1d_0`	`0x000385A0`	`64`	`RW`	`0x0000000800000000`	ccc0_mprt register am_adbase_mem_mem0_sprt_memspace1d_0
`bridge_ccc0_mprt_6_81_am_adbase_mem_mem0_sprt_memspace1e_0`	`0x000385C0`	`64`	`RW`	`0x0000001000000000`	ccc0_mprt register am_adbase_mem_mem0_sprt_memspace1e_0
`bridge_ccc0_mprt_6_81_am_adbase_mem_ram_sprt_ramspace0_0`	`0x000385E0`	`64`	`RW`	`0x00000000FFE00000`	ccc0_mprt register am_adbase_mem_ram_sprt_ramspace0_0
`bridge_ccc0_mprt_6_81_am_adbase_mem_ram_sprt_ramspace1_0`	`0x00038600`	`64`	`RW`	`0x00000000FFE40000`	ccc0_mprt register am_adbase_mem_ram_sprt_ramspace1_0
`bridge_ccc0_mprt_6_81_am_adbase_mem_ram_sprt_ramspace2_0`	`0x00038620`	`64`	`RW`	`0x00000000FFE80000`	ccc0_mprt register am_adbase_mem_ram_sprt_ramspace2_0
`bridge_ccc0_mprt_6_81_am_adbase_mem_ram_sprt_ramspace3_0`	`0x00038640`	`64`	`RW`	`0x00000000FFEA0000`	ccc0_mprt register am_adbase_mem_ram_sprt_ramspace3_0
`bridge_ccc0_mprt_6_81_am_adbase_mem_ram_sprt_ramspace4_0`	`0x00038660`	`64`	`RW`	`0x00000000FFEC0000`	ccc0_mprt register am_adbase_mem_ram_sprt_ramspace4_0
`bridge_ccc0_mprt_6_81_am_adbase_mem_ram_sprt_ramspace5_0`	`0x00038680`	`64`	`RW`	`0x00000000FFEE0000`	ccc0_mprt register am_adbase_mem_ram_sprt_ramspace5_0
`bridge_ccc0_mprt_6_81_am_admask_mem_ios_sprt_iospace0a_0`	`0x00038408`	`64`	`RW`	`0x00000FFFC0000000`	ccc0_mprt register am_admask_mem_ios_sprt_iospace0a_0
`bridge_ccc0_mprt_6_81_am_admask_mem_ios_sprt_iospace0b_0`	`0x00038428`	`64`	`RW`	`0x00000FFFE0000000`	ccc0_mprt register am_admask_mem_ios_sprt_iospace0b_0
`bridge_ccc0_mprt_6_81_am_admask_mem_ios_sprt_iospace1a_0`	`0x00038448`	`64`	`RW`	`0x00000FFFFF000000`	ccc0_mprt register am_admask_mem_ios_sprt_iospace1a_0
`bridge_ccc0_mprt_6_81_am_admask_mem_ios_sprt_iospace1b_0`	`0x00038468`	`64`	`RW`	`0x00000FFFFE000000`	ccc0_mprt register am_admask_mem_ios_sprt_iospace1b_0
`bridge_ccc0_mprt_6_81_am_admask_mem_ios_sprt_iospace1c_0`	`0x00038488`	`64`	`RW`	`0x00000FFFFE000000`	ccc0_mprt register am_admask_mem_ios_sprt_iospace1c_0
`bridge_ccc0_mprt_6_81_am_admask_mem_ios_sprt_iospace1d_0`	`0x000384A8`	`64`	`RW`	`0x00000FFFFF000000`	ccc0_mprt register am_admask_mem_ios_sprt_iospace1d_0
`bridge_ccc0_mprt_6_81_am_admask_mem_ios_sprt_iospace1e_0`	`0x000384C8`	`64`	`RW`	`0x00000FFFFF800000`	ccc0_mprt register am_admask_mem_ios_sprt_iospace1e_0
`bridge_ccc0_mprt_6_81_am_admask_mem_ios_sprt_iospace1f_0`	`0x000384E8`	`64`	`RW`	`0x00000FFFFFC00000`	ccc0_mprt register am_admask_mem_ios_sprt_iospace1f_0
`bridge_ccc0_mprt_6_81_am_admask_mem_ios_sprt_iospace1g_0`	`0x00038508`	`64`	`RW`	`0x00000FFFFFE00000`	ccc0_mprt register am_admask_mem_ios_sprt_iospace1g_0
`bridge_ccc0_mprt_6_81_am_admask_mem_mem0_sprt_memspace0_0`	`0x00038528`	`64`	`RW`	`0x00000FFF80000000`	ccc0_mprt register am_admask_mem_mem0_sprt_memspace0_0
`bridge_ccc0_mprt_6_81_am_admask_mem_mem0_sprt_memspace1a_0`	`0x00038548`	`64`	`RW`	`0x00000FFF00000000`	ccc0_mprt register am_admask_mem_mem0_sprt_memspace1a_0
`bridge_ccc0_mprt_6_81_am_admask_mem_mem0_sprt_memspace1b_0`	`0x00038568`	`64`	`RW`	`0x00000FFE00000000`	ccc0_mprt register am_admask_mem_mem0_sprt_memspace1b_0
`bridge_ccc0_mprt_6_81_am_admask_mem_mem0_sprt_memspace1c_0`	`0x00038588`	`64`	`RW`	`0x00000FFC00000000`	ccc0_mprt register am_admask_mem_mem0_sprt_memspace1c_0
`bridge_ccc0_mprt_6_81_am_admask_mem_mem0_sprt_memspace1d_0`	`0x000385A8`	`64`	`RW`	`0x00000FF800000000`	ccc0_mprt register am_admask_mem_mem0_sprt_memspace1d_0
`bridge_ccc0_mprt_6_81_am_admask_mem_mem0_sprt_memspace1e_0`	`0x000385C8`	`64`	`RW`	`0x00000FF000000000`	ccc0_mprt register am_admask_mem_mem0_sprt_memspace1e_0
`bridge_ccc0_mprt_6_81_am_admask_mem_ram_sprt_ramspace0_0`	`0x000385E8`	`64`	`RW`	`0x00000FFFFFFC0000`	ccc0_mprt register am_admask_mem_ram_sprt_ramspace0_0
`bridge_ccc0_mprt_6_81_am_admask_mem_ram_sprt_ramspace1_0`	`0x00038608`	`64`	`RW`	`0x00000FFFFFFC0000`	ccc0_mprt register am_admask_mem_ram_sprt_ramspace1_0
`bridge_ccc0_mprt_6_81_am_admask_mem_ram_sprt_ramspace2_0`	`0x00038628`	`64`	`RW`	`0x00000FFFFFFE0000`	ccc0_mprt register am_admask_mem_ram_sprt_ramspace2_0
`bridge_ccc0_mprt_6_81_am_admask_mem_ram_sprt_ramspace3_0`	`0x00038648`	`64`	`RW`	`0x00000FFFFFFE0000`	ccc0_mprt register am_admask_mem_ram_sprt_ramspace3_0
`bridge_ccc0_mprt_6_81_am_admask_mem_ram_sprt_ramspace4_0`	`0x00038668`	`64`	`RW`	`0x00000FFFFFFE0000`	ccc0_mprt register am_admask_mem_ram_sprt_ramspace4_0
`bridge_ccc0_mprt_6_81_am_admask_mem_ram_sprt_ramspace5_0`	`0x00038688`	`64`	`RW`	`0x00000FFFFFFE0000`	ccc0_mprt register am_admask_mem_ram_sprt_ramspace5_0
`bridge_ccc0_mprt_6_81_am_bridge_id`	`0x0003BD08`	`64`	`RO`	`0x0000000000000006`	ccc0_mprt register am_bridge_id
`bridge_ccc0_mprt_6_81_am_err`	`0x0003BE00`	`64`	`RW`	`0x0000000000000000`	ccc0_mprt register am_err
`bridge_ccc0_mprt_6_81_am_intm`	`0x0003BE40`	`64`	`RW`	`0x0000000700490049`	ccc0_mprt register am_intm
`bridge_ccc0_mprt_6_81_am_sts`	`0x0003BD00`	`64`	`RO`	`0x000000000000000C`	ccc0_mprt register am_sts
`bridge_ccc0_mprt_6_81_brs_0`	`0x00038130`	`32`	`RO`	`0x00000000`	ccc0_mprt register brs_0
`bridge_ccc0_mprt_6_81_brs_1`	`0x00038138`	`32`	`RO`	`0x00000000`	ccc0_mprt register brs_1
`bridge_ccc0_mprt_6_81_brs_10`	`0x00038180`	`32`	`RO`	`0x00000000`	ccc0_mprt register brs_10
`bridge_ccc0_mprt_6_81_brs_11`	`0x00038188`	`32`	`RO`	`0x00000000`	ccc0_mprt register brs_11
`bridge_ccc0_mprt_6_81_brs_12`	`0x00038190`	`32`	`RO`	`0x00000000`	ccc0_mprt register brs_12
`bridge_ccc0_mprt_6_81_brs_13`	`0x00038198`	`32`	`RO`	`0x00000000`	ccc0_mprt register brs_13
`bridge_ccc0_mprt_6_81_brs_14`	`0x000381A0`	`32`	`RO`	`0x00000000`	ccc0_mprt register brs_14
`bridge_ccc0_mprt_6_81_brs_15`	`0x000381A8`	`32`	`RO`	`0x00000000`	ccc0_mprt register brs_15
`bridge_ccc0_mprt_6_81_brs_2`	`0x00038140`	`32`	`RO`	`0x00000000`	ccc0_mprt register brs_2
`bridge_ccc0_mprt_6_81_brs_3`	`0x00038148`	`32`	`RO`	`0x00000000`	ccc0_mprt register brs_3
`bridge_ccc0_mprt_6_81_brs_4`	`0x00038150`	`32`	`RO`	`0x00000000`	ccc0_mprt register brs_4
`bridge_ccc0_mprt_6_81_brs_5`	`0x00038158`	`32`	`RO`	`0x00000000`	ccc0_mprt register brs_5
`bridge_ccc0_mprt_6_81_brs_6`	`0x00038160`	`32`	`RO`	`0x00000000`	ccc0_mprt register brs_6
`bridge_ccc0_mprt_6_81_brs_7`	`0x00038168`	`32`	`RO`	`0x00000000`	ccc0_mprt register brs_7
`bridge_ccc0_mprt_6_81_brs_8`	`0x00038170`	`32`	`RO`	`0x00000000`	ccc0_mprt register brs_8
`bridge_ccc0_mprt_6_81_brs_9`	`0x00038178`	`32`	`RO`	`0x00000000`	ccc0_mprt register brs_9
`bridge_ccc0_mprt_6_81_brus`	`0x000381B0`	`32`	`RO`	`0x00000000`	ccc0_mprt register brus
`bridge_ccc0_mprt_6_81_btrl_0`	`0x00038080`	`32`	`RW`	`0x001400FF`	ccc0_mprt register btrl_0
`bridge_ccc0_mprt_6_81_btrl_1`	`0x00038088`	`32`	`RW`	`0x001400FF`	ccc0_mprt register btrl_1
`bridge_ccc0_mprt_6_81_btrl_2`	`0x00038090`	`32`	`RW`	`0x001400FF`	ccc0_mprt register btrl_2
`bridge_ccc0_mprt_6_81_btrl_3`	`0x00038098`	`32`	`RW`	`0x00000000`	ccc0_mprt register btrl_3
`bridge_ccc0_mprt_6_81_btus_0`	`0x00038058`	`32`	`RO`	`0x00000000`	ccc0_mprt register btus_0
`bridge_ccc0_mprt_6_81_btus_1`	`0x00038060`	`32`	`RO`	`0x00000000`	ccc0_mprt register btus_1
`bridge_ccc0_mprt_6_81_p_0`	`0x00038000`	`32`	`RW`	`0x03030303`	ccc0_mprt register p_0
`bridge_ccc0_mprt_6_81_p_1`	`0x00038008`	`32`	`RW`	`0x03030303`	ccc0_mprt register p_1
`bridge_ccc0_mprt_6_81_p_2`	`0x00038010`	`32`	`RW`	`0x03030303`	ccc0_mprt register p_2
`bridge_ccc0_mprt_6_81_p_3`	`0x00038018`	`32`	`RW`	`0x03030303`	ccc0_mprt register p_3
`bridge_ccc0_mprt_6_81_rxid`	`0x000381B8`	`32`	`RO`	`0x00000006`	ccc0_mprt register rxid
`bridge_ccc0_mprt_6_81_txid`	`0x00038078`	`32`	`RO`	`0x00000006`	ccc0_mprt register txid
`bridge_ccc0_sprt_7_82_as_bridge_id`	`0x0003DD08`	`64`	`RO`	`0x0000000000000007`	ccc0_sprt register as_bridge_id
`bridge_ccc0_sprt_7_82_as_err`	`0x0003DE00`	`64`	`RW`	`0x0000000000000000`	ccc0_sprt register as_err
`bridge_ccc0_sprt_7_82_as_intm`	`0x0003DE40`	`64`	`RW`	`0x00000001000B0013`	ccc0_sprt register as_intm
`bridge_ccc0_sprt_7_82_as_sts`	`0x0003DD00`	`64`	`RO`	`0x000000000000000C`	ccc0_sprt register as_sts
`bridge_ccc0_sprt_7_82_brs_0`	`0x0003C130`	`32`	`RO`	`0x00000000`	ccc0_sprt register brs_0
`bridge_ccc0_sprt_7_82_brs_1`	`0x0003C138`	`32`	`RO`	`0x00000000`	ccc0_sprt register brs_1
`bridge_ccc0_sprt_7_82_brs_10`	`0x0003C180`	`32`	`RO`	`0x00000000`	ccc0_sprt register brs_10
`bridge_ccc0_sprt_7_82_brs_11`	`0x0003C188`	`32`	`RO`	`0x00000000`	ccc0_sprt register brs_11
`bridge_ccc0_sprt_7_82_brs_12`	`0x0003C190`	`32`	`RO`	`0x00000000`	ccc0_sprt register brs_12
`bridge_ccc0_sprt_7_82_brs_13`	`0x0003C198`	`32`	`RO`	`0x00000000`	ccc0_sprt register brs_13
`bridge_ccc0_sprt_7_82_brs_14`	`0x0003C1A0`	`32`	`RO`	`0x00000000`	ccc0_sprt register brs_14
`bridge_ccc0_sprt_7_82_brs_15`	`0x0003C1A8`	`32`	`RO`	`0x00000000`	ccc0_sprt register brs_15
`bridge_ccc0_sprt_7_82_brs_2`	`0x0003C140`	`32`	`RO`	`0x00000000`	ccc0_sprt register brs_2
`bridge_ccc0_sprt_7_82_brs_3`	`0x0003C148`	`32`	`RO`	`0x00000000`	ccc0_sprt register brs_3
`bridge_ccc0_sprt_7_82_brs_4`	`0x0003C150`	`32`	`RO`	`0x00000000`	ccc0_sprt register brs_4
`bridge_ccc0_sprt_7_82_brs_5`	`0x0003C158`	`32`	`RO`	`0x00000000`	ccc0_sprt register brs_5
`bridge_ccc0_sprt_7_82_brs_6`	`0x0003C160`	`32`	`RO`	`0x00000000`	ccc0_sprt register brs_6
`bridge_ccc0_sprt_7_82_brs_7`	`0x0003C168`	`32`	`RO`	`0x00000000`	ccc0_sprt register brs_7
`bridge_ccc0_sprt_7_82_brs_8`	`0x0003C170`	`32`	`RO`	`0x00000000`	ccc0_sprt register brs_8
`bridge_ccc0_sprt_7_82_brs_9`	`0x0003C178`	`32`	`RO`	`0x00000000`	ccc0_sprt register brs_9
`bridge_ccc0_sprt_7_82_brus`	`0x0003C1B0`	`32`	`RO`	`0x00000000`	ccc0_sprt register brus
`bridge_ccc0_sprt_7_82_btrl_0`	`0x0003C080`	`32`	`RW`	`0x001400FF`	ccc0_sprt register btrl_0
`bridge_ccc0_sprt_7_82_btrl_1`	`0x0003C088`	`32`	`RW`	`0x001400FF`	ccc0_sprt register btrl_1
`bridge_ccc0_sprt_7_82_btrl_2`	`0x0003C090`	`32`	`RW`	`0x001400FF`	ccc0_sprt register btrl_2
`bridge_ccc0_sprt_7_82_btrl_3`	`0x0003C098`	`32`	`RW`	`0x001400FF`	ccc0_sprt register btrl_3
`bridge_ccc0_sprt_7_82_btus_0`	`0x0003C058`	`32`	`RO`	`0x00000000`	ccc0_sprt register btus_0
`bridge_ccc0_sprt_7_82_btus_1`	`0x0003C060`	`32`	`RO`	`0x00000000`	ccc0_sprt register btus_1
`bridge_ccc0_sprt_7_82_p_0`	`0x0003C000`	`32`	`RW`	`0x03030303`	ccc0_sprt register p_0
`bridge_ccc0_sprt_7_82_p_1`	`0x0003C008`	`32`	`RW`	`0x03030303`	ccc0_sprt register p_1
`bridge_ccc0_sprt_7_82_p_2`	`0x0003C010`	`32`	`RW`	`0x03030303`	ccc0_sprt register p_2
`bridge_ccc0_sprt_7_82_p_3`	`0x0003C018`	`32`	`RW`	`0x03030303`	ccc0_sprt register p_3
`bridge_ccc0_sprt_7_82_rxid`	`0x0003C1B8`	`32`	`RO`	`0x00000007`	ccc0_sprt register rxid
`bridge_ccc0_sprt_7_82_txid`	`0x0003C078`	`32`	`RO`	`0x00000007`	ccc0_sprt register txid
`bridge_cpu0_mprt_0_37_SYSCOACK_reg`	`0x00007F78`	`64`	`RO`	`0x0000000000000001`	cpu0_mprt register SYSCOACK_reg
`bridge_cpu0_mprt_0_37_SYSCOREQ_reg`	`0x00007F70`	`64`	`RW`	`0x0000000000000001`	cpu0_mprt register SYSCOREQ_reg
`bridge_cpu0_mprt_0_37_am_adbase_mem_ddrreg_sprt_ddrregspace0_0`	`0x00004400`	`64`	`RW`	`0x00000000F8000010`	cpu0_mprt register am_adbase_mem_ddrreg_sprt_ddrregspace0_0
`bridge_cpu0_mprt_0_37_am_adbase_mem_gic_sprt_gicspace_0`	`0x00004420`	`64`	`RW`	`0x00000000FFFC0000`	cpu0_mprt register am_adbase_mem_gic_sprt_gicspace_0
`bridge_cpu0_mprt_0_37_am_adbase_mem_ios_sprt_iospace0a_0`	`0x00004440`	`64`	`RW`	`0x0000000080000000`	cpu0_mprt register am_adbase_mem_ios_sprt_iospace0a_0
`bridge_cpu0_mprt_0_37_am_adbase_mem_ios_sprt_iospace0b_0`	`0x00004460`	`64`	`RW`	`0x00000000C0000000`	cpu0_mprt register am_adbase_mem_ios_sprt_iospace0b_0
`bridge_cpu0_mprt_0_37_am_adbase_mem_ios_sprt_iospace1a_0`	`0x00004480`	`64`	`RW`	`0x00000000F9000000`	cpu0_mprt register am_adbase_mem_ios_sprt_iospace1a_0
`bridge_cpu0_mprt_0_37_am_adbase_mem_ios_sprt_iospace1b_0`	`0x000044A0`	`64`	`RW`	`0x00000000FA000000`	cpu0_mprt register am_adbase_mem_ios_sprt_iospace1b_0
`bridge_cpu0_mprt_0_37_am_adbase_mem_ios_sprt_iospace1c_0`	`0x000044C0`	`64`	`RW`	`0x00000000FC000000`	cpu0_mprt register am_adbase_mem_ios_sprt_iospace1c_0
`bridge_cpu0_mprt_0_37_am_adbase_mem_ios_sprt_iospace1d_0`	`0x000044E0`	`64`	`RW`	`0x00000000FE000000`	cpu0_mprt register am_adbase_mem_ios_sprt_iospace1d_0
`bridge_cpu0_mprt_0_37_am_adbase_mem_ios_sprt_iospace1e_0`	`0x00004500`	`64`	`RW`	`0x00000000FF000000`	cpu0_mprt register am_adbase_mem_ios_sprt_iospace1e_0
`bridge_cpu0_mprt_0_37_am_adbase_mem_ios_sprt_iospace1f_0`	`0x00004520`	`64`	`RW`	`0x00000000FF800000`	cpu0_mprt register am_adbase_mem_ios_sprt_iospace1f_0
`bridge_cpu0_mprt_0_37_am_adbase_mem_ios_sprt_iospace1g_0`	`0x00004540`	`64`	`RW`	`0x00000000FFC00000`	cpu0_mprt register am_adbase_mem_ios_sprt_iospace1g_0
`bridge_cpu0_mprt_0_37_am_adbase_mem_ios_sprt_iospace2a_0`	`0x00004560`	`64`	`RW`	`0x0000002000000000`	cpu0_mprt register am_adbase_mem_ios_sprt_iospace2a_0
`bridge_cpu0_mprt_0_37_am_adbase_mem_ios_sprt_iospace2b_0`	`0x00004580`	`64`	`RW`	`0x0000004000000000`	cpu0_mprt register am_adbase_mem_ios_sprt_iospace2b_0
`bridge_cpu0_mprt_0_37_am_adbase_mem_ios_sprt_iospace2c_0`	`0x000045A0`	`64`	`RW`	`0x0000008000000000`	cpu0_mprt register am_adbase_mem_ios_sprt_iospace2c_0
`bridge_cpu0_mprt_0_37_am_adbase_mem_mem0_sprt_memspace0_0`	`0x000045C0`	`64`	`RW`	`0x0000000000000010`	cpu0_mprt register am_adbase_mem_mem0_sprt_memspace0_0
`bridge_cpu0_mprt_0_37_am_adbase_mem_mem0_sprt_memspace1a_0`	`0x000045E0`	`64`	`RW`	`0x0000000100000010`	cpu0_mprt register am_adbase_mem_mem0_sprt_memspace1a_0
`bridge_cpu0_mprt_0_37_am_adbase_mem_mem0_sprt_memspace1b_0`	`0x00004600`	`64`	`RW`	`0x0000000200000010`	cpu0_mprt register am_adbase_mem_mem0_sprt_memspace1b_0
`bridge_cpu0_mprt_0_37_am_adbase_mem_mem0_sprt_memspace1c_0`	`0x00004620`	`64`	`RW`	`0x0000000400000010`	cpu0_mprt register am_adbase_mem_mem0_sprt_memspace1c_0
`bridge_cpu0_mprt_0_37_am_adbase_mem_mem0_sprt_memspace1d_0`	`0x00004640`	`64`	`RW`	`0x0000000800000010`	cpu0_mprt register am_adbase_mem_mem0_sprt_memspace1d_0
`bridge_cpu0_mprt_0_37_am_adbase_mem_mem0_sprt_memspace1e_0`	`0x00004660`	`64`	`RW`	`0x0000001000000010`	cpu0_mprt register am_adbase_mem_mem0_sprt_memspace1e_0
`bridge_cpu0_mprt_0_37_am_adbase_mem_ram_sprt_ramspace0_0`	`0x00004680`	`64`	`RW`	`0x00000000FFE00001`	cpu0_mprt register am_adbase_mem_ram_sprt_ramspace0_0
`bridge_cpu0_mprt_0_37_am_adbase_mem_ram_sprt_ramspace1_0`	`0x000046A0`	`64`	`RW`	`0x00000000FFE40010`	cpu0_mprt register am_adbase_mem_ram_sprt_ramspace1_0
`bridge_cpu0_mprt_0_37_am_adbase_mem_ram_sprt_ramspace2_0`	`0x000046C0`	`64`	`RW`	`0x00000000FFE80010`	cpu0_mprt register am_adbase_mem_ram_sprt_ramspace2_0
`bridge_cpu0_mprt_0_37_am_adbase_mem_ram_sprt_ramspace3_0`	`0x000046E0`	`64`	`RW`	`0x00000000FFEA0010`	cpu0_mprt register am_adbase_mem_ram_sprt_ramspace3_0
`bridge_cpu0_mprt_0_37_am_adbase_mem_ram_sprt_ramspace4_0`	`0x00004700`	`64`	`RW`	`0x00000000FFEC0010`	cpu0_mprt register am_adbase_mem_ram_sprt_ramspace4_0
`bridge_cpu0_mprt_0_37_am_adbase_mem_ram_sprt_ramspace5_0`	`0x00004720`	`64`	`RW`	`0x00000000FFEE0010`	cpu0_mprt register am_adbase_mem_ram_sprt_ramspace5_0
`bridge_cpu0_mprt_0_37_am_adbase_mem_rbm_s_regspace_rd_0`	`0x00004740`	`64`	`RW`	`0x00000000F7000008`	cpu0_mprt register am_adbase_mem_rbm_s_regspace_rd_0
`bridge_cpu0_mprt_0_37_am_adbase_mem_rbm_s_regspace_wr_0`	`0x00004760`	`64`	`RW`	`0x00000000F7000001`	cpu0_mprt register am_adbase_mem_rbm_s_regspace_wr_0
`bridge_cpu0_mprt_0_37_am_admask_mem_ddrreg_sprt_ddrregspace0_0`	`0x00004408`	`64`	`RW`	`0x00000FFFFF000000`	cpu0_mprt register am_admask_mem_ddrreg_sprt_ddrregspace0_0
`bridge_cpu0_mprt_0_37_am_admask_mem_gic_sprt_gicspace_0`	`0x00004428`	`64`	`RW`	`0x00000FFFFFFF8000`	cpu0_mprt register am_admask_mem_gic_sprt_gicspace_0
`bridge_cpu0_mprt_0_37_am_admask_mem_ios_sprt_iospace0a_0`	`0x00004448`	`64`	`RW`	`0x00000FFFC0000000`	cpu0_mprt register am_admask_mem_ios_sprt_iospace0a_0
`bridge_cpu0_mprt_0_37_am_admask_mem_ios_sprt_iospace0b_0`	`0x00004468`	`64`	`RW`	`0x00000FFFE0000000`	cpu0_mprt register am_admask_mem_ios_sprt_iospace0b_0
`bridge_cpu0_mprt_0_37_am_admask_mem_ios_sprt_iospace1a_0`	`0x00004488`	`64`	`RW`	`0x00000FFFFF000000`	cpu0_mprt register am_admask_mem_ios_sprt_iospace1a_0
`bridge_cpu0_mprt_0_37_am_admask_mem_ios_sprt_iospace1b_0`	`0x000044A8`	`64`	`RW`	`0x00000FFFFE000000`	cpu0_mprt register am_admask_mem_ios_sprt_iospace1b_0
`bridge_cpu0_mprt_0_37_am_admask_mem_ios_sprt_iospace1c_0`	`0x000044C8`	`64`	`RW`	`0x00000FFFFE000000`	cpu0_mprt register am_admask_mem_ios_sprt_iospace1c_0
`bridge_cpu0_mprt_0_37_am_admask_mem_ios_sprt_iospace1d_0`	`0x000044E8`	`64`	`RW`	`0x00000FFFFF000000`	cpu0_mprt register am_admask_mem_ios_sprt_iospace1d_0
`bridge_cpu0_mprt_0_37_am_admask_mem_ios_sprt_iospace1e_0`	`0x00004508`	`64`	`RW`	`0x00000FFFFF800000`	cpu0_mprt register am_admask_mem_ios_sprt_iospace1e_0
`bridge_cpu0_mprt_0_37_am_admask_mem_ios_sprt_iospace1f_0`	`0x00004528`	`64`	`RW`	`0x00000FFFFFC00000`	cpu0_mprt register am_admask_mem_ios_sprt_iospace1f_0
`bridge_cpu0_mprt_0_37_am_admask_mem_ios_sprt_iospace1g_0`	`0x00004548`	`64`	`RW`	`0x00000FFFFFE00000`	cpu0_mprt register am_admask_mem_ios_sprt_iospace1g_0
`bridge_cpu0_mprt_0_37_am_admask_mem_ios_sprt_iospace2a_0`	`0x00004568`	`64`	`RW`	`0x00000FE000000000`	cpu0_mprt register am_admask_mem_ios_sprt_iospace2a_0
`bridge_cpu0_mprt_0_37_am_admask_mem_ios_sprt_iospace2b_0`	`0x00004588`	`64`	`RW`	`0x00000FC000000000`	cpu0_mprt register am_admask_mem_ios_sprt_iospace2b_0
`bridge_cpu0_mprt_0_37_am_admask_mem_ios_sprt_iospace2c_0`	`0x000045A8`	`64`	`RW`	`0x00000F8000000000`	cpu0_mprt register am_admask_mem_ios_sprt_iospace2c_0
`bridge_cpu0_mprt_0_37_am_admask_mem_mem0_sprt_memspace0_0`	`0x000045C8`	`64`	`RW`	`0x00000FFF80000000`	cpu0_mprt register am_admask_mem_mem0_sprt_memspace0_0
`bridge_cpu0_mprt_0_37_am_admask_mem_mem0_sprt_memspace1a_0`	`0x000045E8`	`64`	`RW`	`0x00000FFF00000000`	cpu0_mprt register am_admask_mem_mem0_sprt_memspace1a_0
`bridge_cpu0_mprt_0_37_am_admask_mem_mem0_sprt_memspace1b_0`	`0x00004608`	`64`	`RW`	`0x00000FFE00000000`	cpu0_mprt register am_admask_mem_mem0_sprt_memspace1b_0
`bridge_cpu0_mprt_0_37_am_admask_mem_mem0_sprt_memspace1c_0`	`0x00004628`	`64`	`RW`	`0x00000FFC00000000`	cpu0_mprt register am_admask_mem_mem0_sprt_memspace1c_0
`bridge_cpu0_mprt_0_37_am_admask_mem_mem0_sprt_memspace1d_0`	`0x00004648`	`64`	`RW`	`0x00000FF800000000`	cpu0_mprt register am_admask_mem_mem0_sprt_memspace1d_0
`bridge_cpu0_mprt_0_37_am_admask_mem_mem0_sprt_memspace1e_0`	`0x00004668`	`64`	`RW`	`0x00000FF000000000`	cpu0_mprt register am_admask_mem_mem0_sprt_memspace1e_0
`bridge_cpu0_mprt_0_37_am_admask_mem_ram_sprt_ramspace0_0`	`0x00004688`	`64`	`RW`	`0x00000FFFFFFC0003`	cpu0_mprt register am_admask_mem_ram_sprt_ramspace0_0
`bridge_cpu0_mprt_0_37_am_admask_mem_ram_sprt_ramspace1_0`	`0x000046A8`	`64`	`RW`	`0x00000FFFFFFC0000`	cpu0_mprt register am_admask_mem_ram_sprt_ramspace1_0
`bridge_cpu0_mprt_0_37_am_admask_mem_ram_sprt_ramspace2_0`	`0x000046C8`	`64`	`RW`	`0x00000FFFFFFE0000`	cpu0_mprt register am_admask_mem_ram_sprt_ramspace2_0
`bridge_cpu0_mprt_0_37_am_admask_mem_ram_sprt_ramspace3_0`	`0x000046E8`	`64`	`RW`	`0x00000FFFFFFE0000`	cpu0_mprt register am_admask_mem_ram_sprt_ramspace3_0
`bridge_cpu0_mprt_0_37_am_admask_mem_ram_sprt_ramspace4_0`	`0x00004708`	`64`	`RW`	`0x00000FFFFFFE0000`	cpu0_mprt register am_admask_mem_ram_sprt_ramspace4_0
`bridge_cpu0_mprt_0_37_am_admask_mem_ram_sprt_ramspace5_0`	`0x00004728`	`64`	`RW`	`0x00000FFFFFFE0000`	cpu0_mprt register am_admask_mem_ram_sprt_ramspace5_0
`bridge_cpu0_mprt_0_37_am_admask_mem_rbm_s_regspace_rd_0`	`0x00004748`	`64`	`RW`	`0x00000FFFFF000008`	cpu0_mprt register am_admask_mem_rbm_s_regspace_rd_0
`bridge_cpu0_mprt_0_37_am_admask_mem_rbm_s_regspace_wr_0`	`0x00004768`	`64`	`RW`	`0x00000FFFFF00000B`	cpu0_mprt register am_admask_mem_rbm_s_regspace_wr_0
`bridge_cpu0_mprt_0_37_am_bridge_id`	`0x00007D08`	`64`	`RO`	`0x0000000000000000`	cpu0_mprt register am_bridge_id
`bridge_cpu0_mprt_0_37_am_err`	`0x00007E00`	`64`	`RW`	`0x0000000000000000`	cpu0_mprt register am_err
`bridge_cpu0_mprt_0_37_am_intm`	`0x00007E40`	`64`	`RW`	`0x00000007004F004F`	cpu0_mprt register am_intm
`bridge_cpu0_mprt_0_37_am_sts`	`0x00007D00`	`64`	`RO`	`0x000000000000000C`	cpu0_mprt register am_sts
`bridge_cpu0_mprt_0_37_brs_0`	`0x00004130`	`32`	`RO`	`0x00000000`	cpu0_mprt register brs_0
`bridge_cpu0_mprt_0_37_brs_1`	`0x00004138`	`32`	`RO`	`0x00000000`	cpu0_mprt register brs_1
`bridge_cpu0_mprt_0_37_brs_10`	`0x00004180`	`32`	`RO`	`0x00000000`	cpu0_mprt register brs_10
`bridge_cpu0_mprt_0_37_brs_11`	`0x00004188`	`32`	`RO`	`0x00000000`	cpu0_mprt register brs_11
`bridge_cpu0_mprt_0_37_brs_12`	`0x00004190`	`32`	`RO`	`0x00000000`	cpu0_mprt register brs_12
`bridge_cpu0_mprt_0_37_brs_13`	`0x00004198`	`32`	`RO`	`0x00000000`	cpu0_mprt register brs_13
`bridge_cpu0_mprt_0_37_brs_14`	`0x000041A0`	`32`	`RO`	`0x00000000`	cpu0_mprt register brs_14
`bridge_cpu0_mprt_0_37_brs_15`	`0x000041A8`	`32`	`RO`	`0x00000000`	cpu0_mprt register brs_15
`bridge_cpu0_mprt_0_37_brs_2`	`0x00004140`	`32`	`RO`	`0x00000000`	cpu0_mprt register brs_2
`bridge_cpu0_mprt_0_37_brs_3`	`0x00004148`	`32`	`RO`	`0x00000000`	cpu0_mprt register brs_3
`bridge_cpu0_mprt_0_37_brs_4`	`0x00004150`	`32`	`RO`	`0x00000000`	cpu0_mprt register brs_4
`bridge_cpu0_mprt_0_37_brs_5`	`0x00004158`	`32`	`RO`	`0x00000000`	cpu0_mprt register brs_5
`bridge_cpu0_mprt_0_37_brs_6`	`0x00004160`	`32`	`RO`	`0x00000000`	cpu0_mprt register brs_6
`bridge_cpu0_mprt_0_37_brs_7`	`0x00004168`	`32`	`RO`	`0x00000000`	cpu0_mprt register brs_7
`bridge_cpu0_mprt_0_37_brs_8`	`0x00004170`	`32`	`RO`	`0x00000000`	cpu0_mprt register brs_8
`bridge_cpu0_mprt_0_37_brs_9`	`0x00004178`	`32`	`RO`	`0x00000000`	cpu0_mprt register brs_9
`bridge_cpu0_mprt_0_37_brus`	`0x000041B0`	`32`	`RO`	`0x00000000`	cpu0_mprt register brus
`bridge_cpu0_mprt_0_37_btrl_0`	`0x00004080`	`32`	`RW`	`0x001400FF`	cpu0_mprt register btrl_0
`bridge_cpu0_mprt_0_37_btrl_1`	`0x00004088`	`32`	`RW`	`0x001400FF`	cpu0_mprt register btrl_1
`bridge_cpu0_mprt_0_37_btrl_2`	`0x00004090`	`32`	`RW`	`0x001400FF`	cpu0_mprt register btrl_2
`bridge_cpu0_mprt_0_37_btrl_3`	`0x00004098`	`32`	`RW`	`0x001400FF`	cpu0_mprt register btrl_3
`bridge_cpu0_mprt_0_37_btus_0`	`0x00004058`	`32`	`RO`	`0x00000000`	cpu0_mprt register btus_0
`bridge_cpu0_mprt_0_37_btus_1`	`0x00004060`	`32`	`RO`	`0x00000000`	cpu0_mprt register btus_1
`bridge_cpu0_mprt_0_37_p_0`	`0x00004000`	`32`	`RW`	`0x03030303`	cpu0_mprt register p_0
`bridge_cpu0_mprt_0_37_p_1`	`0x00004008`	`32`	`RW`	`0x03030303`	cpu0_mprt register p_1
`bridge_cpu0_mprt_0_37_p_2`	`0x00004010`	`32`	`RW`	`0x03030303`	cpu0_mprt register p_2
`bridge_cpu0_mprt_0_37_p_3`	`0x00004018`	`32`	`RW`	`0x03030303`	cpu0_mprt register p_3
`bridge_cpu0_mprt_0_37_rxid`	`0x000041B8`	`32`	`RO`	`0x00000000`	cpu0_mprt register rxid
`bridge_cpu0_mprt_0_37_txid`	`0x00004078`	`32`	`RO`	`0x00000000`	cpu0_mprt register txid
`bridge_ddrreg_sprt_8_118_as_bridge_id`	`0x00009D08`	`64`	`RO`	`0x0000000000000008`	ddrreg_sprt register as_bridge_id
`bridge_ddrreg_sprt_8_118_as_err`	`0x00009E00`	`64`	`RW`	`0x0000000000000000`	ddrreg_sprt register as_err
`bridge_ddrreg_sprt_8_118_as_intm`	`0x00009E40`	`64`	`RW`	`0x00000001000B0013`	ddrreg_sprt register as_intm
`bridge_ddrreg_sprt_8_118_as_sts`	`0x00009D00`	`64`	`RO`	`0x000000000000000C`	ddrreg_sprt register as_sts
`bridge_ddrreg_sprt_8_118_brs_0`	`0x00008130`	`32`	`RO`	`0x00000000`	ddrreg_sprt register brs_0
`bridge_ddrreg_sprt_8_118_brs_1`	`0x00008138`	`32`	`RO`	`0x00000000`	ddrreg_sprt register brs_1
`bridge_ddrreg_sprt_8_118_brs_10`	`0x00008180`	`32`	`RO`	`0x00000000`	ddrreg_sprt register brs_10
`bridge_ddrreg_sprt_8_118_brs_11`	`0x00008188`	`32`	`RO`	`0x00000000`	ddrreg_sprt register brs_11
`bridge_ddrreg_sprt_8_118_brs_12`	`0x00008190`	`32`	`RO`	`0x00000000`	ddrreg_sprt register brs_12
`bridge_ddrreg_sprt_8_118_brs_13`	`0x00008198`	`32`	`RO`	`0x00000000`	ddrreg_sprt register brs_13
`bridge_ddrreg_sprt_8_118_brs_14`	`0x000081A0`	`32`	`RO`	`0x00000000`	ddrreg_sprt register brs_14
`bridge_ddrreg_sprt_8_118_brs_15`	`0x000081A8`	`32`	`RO`	`0x00000000`	ddrreg_sprt register brs_15
`bridge_ddrreg_sprt_8_118_brs_2`	`0x00008140`	`32`	`RO`	`0x00000000`	ddrreg_sprt register brs_2
`bridge_ddrreg_sprt_8_118_brs_3`	`0x00008148`	`32`	`RO`	`0x00000000`	ddrreg_sprt register brs_3
`bridge_ddrreg_sprt_8_118_brs_4`	`0x00008150`	`32`	`RO`	`0x00000000`	ddrreg_sprt register brs_4
`bridge_ddrreg_sprt_8_118_brs_5`	`0x00008158`	`32`	`RO`	`0x00000000`	ddrreg_sprt register brs_5
`bridge_ddrreg_sprt_8_118_brs_6`	`0x00008160`	`32`	`RO`	`0x00000000`	ddrreg_sprt register brs_6
`bridge_ddrreg_sprt_8_118_brs_7`	`0x00008168`	`32`	`RO`	`0x00000000`	ddrreg_sprt register brs_7
`bridge_ddrreg_sprt_8_118_brs_8`	`0x00008170`	`32`	`RO`	`0x00000000`	ddrreg_sprt register brs_8
`bridge_ddrreg_sprt_8_118_brs_9`	`0x00008178`	`32`	`RO`	`0x00000000`	ddrreg_sprt register brs_9
`bridge_ddrreg_sprt_8_118_brus`	`0x000081B0`	`32`	`RO`	`0x00000000`	ddrreg_sprt register brus
`bridge_ddrreg_sprt_8_118_btrl_0`	`0x00008080`	`32`	`RW`	`0x001400FF`	ddrreg_sprt register btrl_0
`bridge_ddrreg_sprt_8_118_btrl_1`	`0x00008088`	`32`	`RW`	`0x001400FF`	ddrreg_sprt register btrl_1
`bridge_ddrreg_sprt_8_118_btrl_2`	`0x00008090`	`32`	`RW`	`0x00000000`	ddrreg_sprt register btrl_2
`bridge_ddrreg_sprt_8_118_btrl_3`	`0x00008098`	`32`	`RW`	`0x00000000`	ddrreg_sprt register btrl_3
`bridge_ddrreg_sprt_8_118_btus_0`	`0x00008058`	`32`	`RO`	`0x00000000`	ddrreg_sprt register btus_0
`bridge_ddrreg_sprt_8_118_btus_1`	`0x00008060`	`32`	`RO`	`0x00000000`	ddrreg_sprt register btus_1
`bridge_ddrreg_sprt_8_118_p_0`	`0x00008000`	`32`	`RW`	`0x03030303`	ddrreg_sprt register p_0
`bridge_ddrreg_sprt_8_118_p_1`	`0x00008008`	`32`	`RW`	`0x03030303`	ddrreg_sprt register p_1
`bridge_ddrreg_sprt_8_118_p_2`	`0x00008010`	`32`	`RW`	`0x03030303`	ddrreg_sprt register p_2
`bridge_ddrreg_sprt_8_118_p_3`	`0x00008018`	`32`	`RW`	`0x03030303`	ddrreg_sprt register p_3
`bridge_ddrreg_sprt_8_118_rxid`	`0x000081B8`	`32`	`RO`	`0x00000008`	ddrreg_sprt register rxid
`bridge_ddrreg_sprt_8_118_txid`	`0x00008078`	`32`	`RO`	`0x00000008`	ddrreg_sprt register txid
`bridge_dvm0_sprt_9_70_as_bridge_id`	`0x00041D08`	`64`	`RO`	`0x0000000000000009`	dvm0_sprt register as_bridge_id
`bridge_dvm0_sprt_9_70_as_err`	`0x00041E00`	`64`	`RW`	`0x0000000000000000`	dvm0_sprt register as_err
`bridge_dvm0_sprt_9_70_as_intm`	`0x00041E40`	`64`	`RW`	`0x00000001000B0013`	dvm0_sprt register as_intm
`bridge_dvm0_sprt_9_70_as_sts`	`0x00041D00`	`64`	`RO`	`0x000000000000000C`	dvm0_sprt register as_sts
`bridge_dvm0_sprt_9_70_brs_0`	`0x00040130`	`32`	`RO`	`0x00000000`	dvm0_sprt register brs_0
`bridge_dvm0_sprt_9_70_brs_1`	`0x00040138`	`32`	`RO`	`0x00000000`	dvm0_sprt register brs_1
`bridge_dvm0_sprt_9_70_brs_10`	`0x00040180`	`32`	`RO`	`0x00000000`	dvm0_sprt register brs_10
`bridge_dvm0_sprt_9_70_brs_11`	`0x00040188`	`32`	`RO`	`0x00000000`	dvm0_sprt register brs_11
`bridge_dvm0_sprt_9_70_brs_12`	`0x00040190`	`32`	`RO`	`0x00000000`	dvm0_sprt register brs_12
`bridge_dvm0_sprt_9_70_brs_13`	`0x00040198`	`32`	`RO`	`0x00000000`	dvm0_sprt register brs_13
`bridge_dvm0_sprt_9_70_brs_14`	`0x000401A0`	`32`	`RO`	`0x00000000`	dvm0_sprt register brs_14
`bridge_dvm0_sprt_9_70_brs_15`	`0x000401A8`	`32`	`RO`	`0x00000000`	dvm0_sprt register brs_15
`bridge_dvm0_sprt_9_70_brs_2`	`0x00040140`	`32`	`RO`	`0x00000000`	dvm0_sprt register brs_2
`bridge_dvm0_sprt_9_70_brs_3`	`0x00040148`	`32`	`RO`	`0x00000000`	dvm0_sprt register brs_3
`bridge_dvm0_sprt_9_70_brs_4`	`0x00040150`	`32`	`RO`	`0x00000000`	dvm0_sprt register brs_4
`bridge_dvm0_sprt_9_70_brs_5`	`0x00040158`	`32`	`RO`	`0x00000000`	dvm0_sprt register brs_5
`bridge_dvm0_sprt_9_70_brs_6`	`0x00040160`	`32`	`RO`	`0x00000000`	dvm0_sprt register brs_6
`bridge_dvm0_sprt_9_70_brs_7`	`0x00040168`	`32`	`RO`	`0x00000000`	dvm0_sprt register brs_7
`bridge_dvm0_sprt_9_70_brs_8`	`0x00040170`	`32`	`RO`	`0x00000000`	dvm0_sprt register brs_8
`bridge_dvm0_sprt_9_70_brs_9`	`0x00040178`	`32`	`RO`	`0x00000000`	dvm0_sprt register brs_9
`bridge_dvm0_sprt_9_70_brus`	`0x000401B0`	`32`	`RO`	`0x00000000`	dvm0_sprt register brus
`bridge_dvm0_sprt_9_70_btrl_0`	`0x00040080`	`32`	`RW`	`0x001400FF`	dvm0_sprt register btrl_0
`bridge_dvm0_sprt_9_70_btrl_1`	`0x00040088`	`32`	`RW`	`0x001400FF`	dvm0_sprt register btrl_1
`bridge_dvm0_sprt_9_70_btrl_2`	`0x00040090`	`32`	`RW`	`0x001400FF`	dvm0_sprt register btrl_2
`bridge_dvm0_sprt_9_70_btrl_3`	`0x00040098`	`32`	`RW`	`0x00000000`	dvm0_sprt register btrl_3
`bridge_dvm0_sprt_9_70_btus_0`	`0x00040058`	`32`	`RO`	`0x00000000`	dvm0_sprt register btus_0
`bridge_dvm0_sprt_9_70_btus_1`	`0x00040060`	`32`	`RO`	`0x00000000`	dvm0_sprt register btus_1
`bridge_dvm0_sprt_9_70_p_0`	`0x00040000`	`32`	`RW`	`0x03030303`	dvm0_sprt register p_0
`bridge_dvm0_sprt_9_70_p_1`	`0x00040008`	`32`	`RW`	`0x03030303`	dvm0_sprt register p_1
`bridge_dvm0_sprt_9_70_p_2`	`0x00040010`	`32`	`RW`	`0x03030303`	dvm0_sprt register p_2
`bridge_dvm0_sprt_9_70_p_3`	`0x00040018`	`32`	`RW`	`0x03030303`	dvm0_sprt register p_3
`bridge_dvm0_sprt_9_70_rxid`	`0x000401B8`	`32`	`RO`	`0x00000009`	dvm0_sprt register rxid
`bridge_dvm0_sprt_9_70_txid`	`0x00040078`	`32`	`RO`	`0x00000009`	dvm0_sprt register txid
`bridge_fpga0ace_mprt_1_118_SYSCOACK_reg`	`0x0000FF78`	`64`	`RO`	`0x0000000000000001`	fpga0ace_mprt register SYSCOACK_reg
`bridge_fpga0ace_mprt_1_118_SYSCOREQ_reg`	`0x0000FF70`	`64`	`RW`	`0x0000000000000001`	fpga0ace_mprt register SYSCOREQ_reg
`bridge_fpga0ace_mprt_1_118_am_adbase_mem_ddrreg_sprt_ddrregspace0_0`	`0x0000C400`	`64`	`RW`	`0x00000000F8000010`	fpga0ace_mprt register am_adbase_mem_ddrreg_sprt_ddrregspace0_0
`bridge_fpga0ace_mprt_1_118_am_adbase_mem_ios_sprt_iospace0a_0`	`0x0000C420`	`64`	`RW`	`0x0000000080000000`	fpga0ace_mprt register am_adbase_mem_ios_sprt_iospace0a_0
`bridge_fpga0ace_mprt_1_118_am_adbase_mem_ios_sprt_iospace0b_0`	`0x0000C440`	`64`	`RW`	`0x00000000C0000000`	fpga0ace_mprt register am_adbase_mem_ios_sprt_iospace0b_0
`bridge_fpga0ace_mprt_1_118_am_adbase_mem_ios_sprt_iospace1a_0`	`0x0000C460`	`64`	`RW`	`0x00000000F9000000`	fpga0ace_mprt register am_adbase_mem_ios_sprt_iospace1a_0
`bridge_fpga0ace_mprt_1_118_am_adbase_mem_ios_sprt_iospace1b_0`	`0x0000C480`	`64`	`RW`	`0x00000000FA000000`	fpga0ace_mprt register am_adbase_mem_ios_sprt_iospace1b_0
`bridge_fpga0ace_mprt_1_118_am_adbase_mem_ios_sprt_iospace1c_0`	`0x0000C4A0`	`64`	`RW`	`0x00000000FC000000`	fpga0ace_mprt register am_adbase_mem_ios_sprt_iospace1c_0
`bridge_fpga0ace_mprt_1_118_am_adbase_mem_ios_sprt_iospace1d_0`	`0x0000C4C0`	`64`	`RW`	`0x00000000FE000000`	fpga0ace_mprt register am_adbase_mem_ios_sprt_iospace1d_0
`bridge_fpga0ace_mprt_1_118_am_adbase_mem_ios_sprt_iospace1e_0`	`0x0000C4E0`	`64`	`RW`	`0x00000000FF000000`	fpga0ace_mprt register am_adbase_mem_ios_sprt_iospace1e_0
`bridge_fpga0ace_mprt_1_118_am_adbase_mem_ios_sprt_iospace1f_0`	`0x0000C500`	`64`	`RW`	`0x00000000FF800000`	fpga0ace_mprt register am_adbase_mem_ios_sprt_iospace1f_0
`bridge_fpga0ace_mprt_1_118_am_adbase_mem_ios_sprt_iospace1g_0`	`0x0000C520`	`64`	`RW`	`0x00000000FFC00000`	fpga0ace_mprt register am_adbase_mem_ios_sprt_iospace1g_0
`bridge_fpga0ace_mprt_1_118_am_adbase_mem_ios_sprt_iospace2a_0`	`0x0000C540`	`64`	`RW`	`0x0000002000000000`	fpga0ace_mprt register am_adbase_mem_ios_sprt_iospace2a_0
`bridge_fpga0ace_mprt_1_118_am_adbase_mem_ios_sprt_iospace2b_0`	`0x0000C560`	`64`	`RW`	`0x0000004000000000`	fpga0ace_mprt register am_adbase_mem_ios_sprt_iospace2b_0
`bridge_fpga0ace_mprt_1_118_am_adbase_mem_ios_sprt_iospace2c_0`	`0x0000C580`	`64`	`RW`	`0x0000008000000000`	fpga0ace_mprt register am_adbase_mem_ios_sprt_iospace2c_0
`bridge_fpga0ace_mprt_1_118_am_adbase_mem_mem0_sprt_memspace0_0`	`0x0000C5A0`	`64`	`RW`	`0x0000000000000010`	fpga0ace_mprt register am_adbase_mem_mem0_sprt_memspace0_0
`bridge_fpga0ace_mprt_1_118_am_adbase_mem_mem0_sprt_memspace1a_0`	`0x0000C5C0`	`64`	`RW`	`0x0000000100000010`	fpga0ace_mprt register am_adbase_mem_mem0_sprt_memspace1a_0
`bridge_fpga0ace_mprt_1_118_am_adbase_mem_mem0_sprt_memspace1b_0`	`0x0000C5E0`	`64`	`RW`	`0x0000000200000010`	fpga0ace_mprt register am_adbase_mem_mem0_sprt_memspace1b_0
`bridge_fpga0ace_mprt_1_118_am_adbase_mem_mem0_sprt_memspace1c_0`	`0x0000C600`	`64`	`RW`	`0x0000000400000010`	fpga0ace_mprt register am_adbase_mem_mem0_sprt_memspace1c_0
`bridge_fpga0ace_mprt_1_118_am_adbase_mem_mem0_sprt_memspace1d_0`	`0x0000C620`	`64`	`RW`	`0x0000000800000010`	fpga0ace_mprt register am_adbase_mem_mem0_sprt_memspace1d_0
`bridge_fpga0ace_mprt_1_118_am_adbase_mem_mem0_sprt_memspace1e_0`	`0x0000C640`	`64`	`RW`	`0x0000001000000010`	fpga0ace_mprt register am_adbase_mem_mem0_sprt_memspace1e_0
`bridge_fpga0ace_mprt_1_118_am_adbase_mem_ram_sprt_ramspace0_0`	`0x0000C660`	`64`	`RW`	`0x00000000FFE00001`	fpga0ace_mprt register am_adbase_mem_ram_sprt_ramspace0_0
`bridge_fpga0ace_mprt_1_118_am_adbase_mem_ram_sprt_ramspace1_0`	`0x0000C680`	`64`	`RW`	`0x00000000FFE40010`	fpga0ace_mprt register am_adbase_mem_ram_sprt_ramspace1_0
`bridge_fpga0ace_mprt_1_118_am_adbase_mem_ram_sprt_ramspace2_0`	`0x0000C6A0`	`64`	`RW`	`0x00000000FFE80010`	fpga0ace_mprt register am_adbase_mem_ram_sprt_ramspace2_0
`bridge_fpga0ace_mprt_1_118_am_adbase_mem_ram_sprt_ramspace3_0`	`0x0000C6C0`	`64`	`RW`	`0x00000000FFEA0010`	fpga0ace_mprt register am_adbase_mem_ram_sprt_ramspace3_0
`bridge_fpga0ace_mprt_1_118_am_adbase_mem_ram_sprt_ramspace4_0`	`0x0000C6E0`	`64`	`RW`	`0x00000000FFEC0010`	fpga0ace_mprt register am_adbase_mem_ram_sprt_ramspace4_0
`bridge_fpga0ace_mprt_1_118_am_adbase_mem_ram_sprt_ramspace5_0`	`0x0000C700`	`64`	`RW`	`0x00000000FFEE0010`	fpga0ace_mprt register am_adbase_mem_ram_sprt_ramspace5_0
`bridge_fpga0ace_mprt_1_118_am_admask_mem_ddrreg_sprt_ddrregspace0_0`	`0x0000C408`	`64`	`RW`	`0x00000FFFFF000000`	fpga0ace_mprt register am_admask_mem_ddrreg_sprt_ddrregspace0_0
`bridge_fpga0ace_mprt_1_118_am_admask_mem_ios_sprt_iospace0a_0`	`0x0000C428`	`64`	`RW`	`0x00000FFFC0000000`	fpga0ace_mprt register am_admask_mem_ios_sprt_iospace0a_0
`bridge_fpga0ace_mprt_1_118_am_admask_mem_ios_sprt_iospace0b_0`	`0x0000C448`	`64`	`RW`	`0x00000FFFE0000000`	fpga0ace_mprt register am_admask_mem_ios_sprt_iospace0b_0
`bridge_fpga0ace_mprt_1_118_am_admask_mem_ios_sprt_iospace1a_0`	`0x0000C468`	`64`	`RW`	`0x00000FFFFF000000`	fpga0ace_mprt register am_admask_mem_ios_sprt_iospace1a_0
`bridge_fpga0ace_mprt_1_118_am_admask_mem_ios_sprt_iospace1b_0`	`0x0000C488`	`64`	`RW`	`0x00000FFFFE000000`	fpga0ace_mprt register am_admask_mem_ios_sprt_iospace1b_0
`bridge_fpga0ace_mprt_1_118_am_admask_mem_ios_sprt_iospace1c_0`	`0x0000C4A8`	`64`	`RW`	`0x00000FFFFE000000`	fpga0ace_mprt register am_admask_mem_ios_sprt_iospace1c_0
`bridge_fpga0ace_mprt_1_118_am_admask_mem_ios_sprt_iospace1d_0`	`0x0000C4C8`	`64`	`RW`	`0x00000FFFFF000000`	fpga0ace_mprt register am_admask_mem_ios_sprt_iospace1d_0
`bridge_fpga0ace_mprt_1_118_am_admask_mem_ios_sprt_iospace1e_0`	`0x0000C4E8`	`64`	`RW`	`0x00000FFFFF800000`	fpga0ace_mprt register am_admask_mem_ios_sprt_iospace1e_0
`bridge_fpga0ace_mprt_1_118_am_admask_mem_ios_sprt_iospace1f_0`	`0x0000C508`	`64`	`RW`	`0x00000FFFFFC00000`	fpga0ace_mprt register am_admask_mem_ios_sprt_iospace1f_0
`bridge_fpga0ace_mprt_1_118_am_admask_mem_ios_sprt_iospace1g_0`	`0x0000C528`	`64`	`RW`	`0x00000FFFFFE00000`	fpga0ace_mprt register am_admask_mem_ios_sprt_iospace1g_0
`bridge_fpga0ace_mprt_1_118_am_admask_mem_ios_sprt_iospace2a_0`	`0x0000C548`	`64`	`RW`	`0x00000FE000000000`	fpga0ace_mprt register am_admask_mem_ios_sprt_iospace2a_0
`bridge_fpga0ace_mprt_1_118_am_admask_mem_ios_sprt_iospace2b_0`	`0x0000C568`	`64`	`RW`	`0x00000FC000000000`	fpga0ace_mprt register am_admask_mem_ios_sprt_iospace2b_0
`bridge_fpga0ace_mprt_1_118_am_admask_mem_ios_sprt_iospace2c_0`	`0x0000C588`	`64`	`RW`	`0x00000F8000000000`	fpga0ace_mprt register am_admask_mem_ios_sprt_iospace2c_0
`bridge_fpga0ace_mprt_1_118_am_admask_mem_mem0_sprt_memspace0_0`	`0x0000C5A8`	`64`	`RW`	`0x00000FFF80000000`	fpga0ace_mprt register am_admask_mem_mem0_sprt_memspace0_0
`bridge_fpga0ace_mprt_1_118_am_admask_mem_mem0_sprt_memspace1a_0`	`0x0000C5C8`	`64`	`RW`	`0x00000FFF00000000`	fpga0ace_mprt register am_admask_mem_mem0_sprt_memspace1a_0
`bridge_fpga0ace_mprt_1_118_am_admask_mem_mem0_sprt_memspace1b_0`	`0x0000C5E8`	`64`	`RW`	`0x00000FFE00000000`	fpga0ace_mprt register am_admask_mem_mem0_sprt_memspace1b_0
`bridge_fpga0ace_mprt_1_118_am_admask_mem_mem0_sprt_memspace1c_0`	`0x0000C608`	`64`	`RW`	`0x00000FFC00000000`	fpga0ace_mprt register am_admask_mem_mem0_sprt_memspace1c_0
`bridge_fpga0ace_mprt_1_118_am_admask_mem_mem0_sprt_memspace1d_0`	`0x0000C628`	`64`	`RW`	`0x00000FF800000000`	fpga0ace_mprt register am_admask_mem_mem0_sprt_memspace1d_0
`bridge_fpga0ace_mprt_1_118_am_admask_mem_mem0_sprt_memspace1e_0`	`0x0000C648`	`64`	`RW`	`0x00000FF000000000`	fpga0ace_mprt register am_admask_mem_mem0_sprt_memspace1e_0
`bridge_fpga0ace_mprt_1_118_am_admask_mem_ram_sprt_ramspace0_0`	`0x0000C668`	`64`	`RW`	`0x00000FFFFFFC0003`	fpga0ace_mprt register am_admask_mem_ram_sprt_ramspace0_0
`bridge_fpga0ace_mprt_1_118_am_admask_mem_ram_sprt_ramspace1_0`	`0x0000C688`	`64`	`RW`	`0x00000FFFFFFC0000`	fpga0ace_mprt register am_admask_mem_ram_sprt_ramspace1_0
`bridge_fpga0ace_mprt_1_118_am_admask_mem_ram_sprt_ramspace2_0`	`0x0000C6A8`	`64`	`RW`	`0x00000FFFFFFE0000`	fpga0ace_mprt register am_admask_mem_ram_sprt_ramspace2_0
`bridge_fpga0ace_mprt_1_118_am_admask_mem_ram_sprt_ramspace3_0`	`0x0000C6C8`	`64`	`RW`	`0x00000FFFFFFE0000`	fpga0ace_mprt register am_admask_mem_ram_sprt_ramspace3_0
`bridge_fpga0ace_mprt_1_118_am_admask_mem_ram_sprt_ramspace4_0`	`0x0000C6E8`	`64`	`RW`	`0x00000FFFFFFE0000`	fpga0ace_mprt register am_admask_mem_ram_sprt_ramspace4_0
`bridge_fpga0ace_mprt_1_118_am_admask_mem_ram_sprt_ramspace5_0`	`0x0000C708`	`64`	`RW`	`0x00000FFFFFFE0000`	fpga0ace_mprt register am_admask_mem_ram_sprt_ramspace5_0
`bridge_fpga0ace_mprt_1_118_am_bridge_id`	`0x0000FD08`	`64`	`RO`	`0x0000000000000001`	fpga0ace_mprt register am_bridge_id
`bridge_fpga0ace_mprt_1_118_am_err`	`0x0000FE00`	`64`	`RW`	`0x0000000000000000`	fpga0ace_mprt register am_err
`bridge_fpga0ace_mprt_1_118_am_intm`	`0x0000FE40`	`64`	`RW`	`0x00000007004F004F`	fpga0ace_mprt register am_intm
`bridge_fpga0ace_mprt_1_118_am_sts`	`0x0000FD00`	`64`	`RO`	`0x000000000000000C`	fpga0ace_mprt register am_sts
`bridge_fpga0ace_mprt_1_118_brs_0`	`0x0000C130`	`32`	`RO`	`0x00000000`	fpga0ace_mprt register brs_0
`bridge_fpga0ace_mprt_1_118_brs_1`	`0x0000C138`	`32`	`RO`	`0x00000000`	fpga0ace_mprt register brs_1
`bridge_fpga0ace_mprt_1_118_brs_10`	`0x0000C180`	`32`	`RO`	`0x00000000`	fpga0ace_mprt register brs_10
`bridge_fpga0ace_mprt_1_118_brs_11`	`0x0000C188`	`32`	`RO`	`0x00000000`	fpga0ace_mprt register brs_11
`bridge_fpga0ace_mprt_1_118_brs_12`	`0x0000C190`	`32`	`RO`	`0x00000000`	fpga0ace_mprt register brs_12
`bridge_fpga0ace_mprt_1_118_brs_13`	`0x0000C198`	`32`	`RO`	`0x00000000`	fpga0ace_mprt register brs_13
`bridge_fpga0ace_mprt_1_118_brs_14`	`0x0000C1A0`	`32`	`RO`	`0x00000000`	fpga0ace_mprt register brs_14
`bridge_fpga0ace_mprt_1_118_brs_15`	`0x0000C1A8`	`32`	`RO`	`0x00000000`	fpga0ace_mprt register brs_15
`bridge_fpga0ace_mprt_1_118_brs_2`	`0x0000C140`	`32`	`RO`	`0x00000000`	fpga0ace_mprt register brs_2
`bridge_fpga0ace_mprt_1_118_brs_3`	`0x0000C148`	`32`	`RO`	`0x00000000`	fpga0ace_mprt register brs_3
`bridge_fpga0ace_mprt_1_118_brs_4`	`0x0000C150`	`32`	`RO`	`0x00000000`	fpga0ace_mprt register brs_4
`bridge_fpga0ace_mprt_1_118_brs_5`	`0x0000C158`	`32`	`RO`	`0x00000000`	fpga0ace_mprt register brs_5
`bridge_fpga0ace_mprt_1_118_brs_6`	`0x0000C160`	`32`	`RO`	`0x00000000`	fpga0ace_mprt register brs_6
`bridge_fpga0ace_mprt_1_118_brs_7`	`0x0000C168`	`32`	`RO`	`0x00000000`	fpga0ace_mprt register brs_7
`bridge_fpga0ace_mprt_1_118_brs_8`	`0x0000C170`	`32`	`RO`	`0x00000000`	fpga0ace_mprt register brs_8
`bridge_fpga0ace_mprt_1_118_brs_9`	`0x0000C178`	`32`	`RO`	`0x00000000`	fpga0ace_mprt register brs_9
`bridge_fpga0ace_mprt_1_118_brus`	`0x0000C1B0`	`32`	`RO`	`0x00000000`	fpga0ace_mprt register brus
`bridge_fpga0ace_mprt_1_118_btrl_0`	`0x0000C080`	`32`	`RW`	`0x001400FF`	fpga0ace_mprt register btrl_0
`bridge_fpga0ace_mprt_1_118_btrl_1`	`0x0000C088`	`32`	`RW`	`0x001400FF`	fpga0ace_mprt register btrl_1
`bridge_fpga0ace_mprt_1_118_btrl_2`	`0x0000C090`	`32`	`RW`	`0x001400FF`	fpga0ace_mprt register btrl_2
`bridge_fpga0ace_mprt_1_118_btrl_3`	`0x0000C098`	`32`	`RW`	`0x001400FF`	fpga0ace_mprt register btrl_3
`bridge_fpga0ace_mprt_1_118_btus_0`	`0x0000C058`	`32`	`RO`	`0x00000000`	fpga0ace_mprt register btus_0
`bridge_fpga0ace_mprt_1_118_btus_1`	`0x0000C060`	`32`	`RO`	`0x00000000`	fpga0ace_mprt register btus_1
`bridge_fpga0ace_mprt_1_118_p_0`	`0x0000C000`	`32`	`RW`	`0x03030303`	fpga0ace_mprt register p_0
`bridge_fpga0ace_mprt_1_118_p_1`	`0x0000C008`	`32`	`RW`	`0x03030303`	fpga0ace_mprt register p_1
`bridge_fpga0ace_mprt_1_118_p_2`	`0x0000C010`	`32`	`RW`	`0x03030303`	fpga0ace_mprt register p_2
`bridge_fpga0ace_mprt_1_118_p_3`	`0x0000C018`	`32`	`RW`	`0x03030303`	fpga0ace_mprt register p_3
`bridge_fpga0ace_mprt_1_118_rxid`	`0x0000C1B8`	`32`	`RO`	`0x00000001`	fpga0ace_mprt register rxid
`bridge_fpga0ace_mprt_1_118_txid`	`0x0000C078`	`32`	`RO`	`0x00000001`	fpga0ace_mprt register txid
`bridge_fpga1acel_mprt_4_118_am_adbase_mem_ddrreg_sprt_ddrregspace0_0`	`0x00010400`	`64`	`RW`	`0x00000000F8000010`	fpga1acel_mprt register am_adbase_mem_ddrreg_sprt_ddrregspace0_0
`bridge_fpga1acel_mprt_4_118_am_adbase_mem_ios_sprt_iospace0a_0`	`0x00010420`	`64`	`RW`	`0x0000000080000000`	fpga1acel_mprt register am_adbase_mem_ios_sprt_iospace0a_0
`bridge_fpga1acel_mprt_4_118_am_adbase_mem_ios_sprt_iospace0b_0`	`0x00010440`	`64`	`RW`	`0x00000000C0000000`	fpga1acel_mprt register am_adbase_mem_ios_sprt_iospace0b_0
`bridge_fpga1acel_mprt_4_118_am_adbase_mem_ios_sprt_iospace1a_0`	`0x00010460`	`64`	`RW`	`0x00000000F9000000`	fpga1acel_mprt register am_adbase_mem_ios_sprt_iospace1a_0
`bridge_fpga1acel_mprt_4_118_am_adbase_mem_ios_sprt_iospace1b_0`	`0x00010480`	`64`	`RW`	`0x00000000FA000000`	fpga1acel_mprt register am_adbase_mem_ios_sprt_iospace1b_0
`bridge_fpga1acel_mprt_4_118_am_adbase_mem_ios_sprt_iospace1c_0`	`0x000104A0`	`64`	`RW`	`0x00000000FC000000`	fpga1acel_mprt register am_adbase_mem_ios_sprt_iospace1c_0
`bridge_fpga1acel_mprt_4_118_am_adbase_mem_ios_sprt_iospace1d_0`	`0x000104C0`	`64`	`RW`	`0x00000000FE000000`	fpga1acel_mprt register am_adbase_mem_ios_sprt_iospace1d_0
`bridge_fpga1acel_mprt_4_118_am_adbase_mem_ios_sprt_iospace1e_0`	`0x000104E0`	`64`	`RW`	`0x00000000FF000000`	fpga1acel_mprt register am_adbase_mem_ios_sprt_iospace1e_0
`bridge_fpga1acel_mprt_4_118_am_adbase_mem_ios_sprt_iospace1f_0`	`0x00010500`	`64`	`RW`	`0x00000000FF800000`	fpga1acel_mprt register am_adbase_mem_ios_sprt_iospace1f_0
`bridge_fpga1acel_mprt_4_118_am_adbase_mem_ios_sprt_iospace1g_0`	`0x00010520`	`64`	`RW`	`0x00000000FFC00000`	fpga1acel_mprt register am_adbase_mem_ios_sprt_iospace1g_0
`bridge_fpga1acel_mprt_4_118_am_adbase_mem_ios_sprt_iospace2a_0`	`0x00010540`	`64`	`RW`	`0x0000002000000000`	fpga1acel_mprt register am_adbase_mem_ios_sprt_iospace2a_0
`bridge_fpga1acel_mprt_4_118_am_adbase_mem_ios_sprt_iospace2b_0`	`0x00010560`	`64`	`RW`	`0x0000004000000000`	fpga1acel_mprt register am_adbase_mem_ios_sprt_iospace2b_0
`bridge_fpga1acel_mprt_4_118_am_adbase_mem_ios_sprt_iospace2c_0`	`0x00010580`	`64`	`RW`	`0x0000008000000000`	fpga1acel_mprt register am_adbase_mem_ios_sprt_iospace2c_0
`bridge_fpga1acel_mprt_4_118_am_adbase_mem_mem0_sprt_memspace0_0`	`0x000105A0`	`64`	`RW`	`0x0000000000000010`	fpga1acel_mprt register am_adbase_mem_mem0_sprt_memspace0_0
`bridge_fpga1acel_mprt_4_118_am_adbase_mem_mem0_sprt_memspace1a_0`	`0x000105C0`	`64`	`RW`	`0x0000000100000010`	fpga1acel_mprt register am_adbase_mem_mem0_sprt_memspace1a_0
`bridge_fpga1acel_mprt_4_118_am_adbase_mem_mem0_sprt_memspace1b_0`	`0x000105E0`	`64`	`RW`	`0x0000000200000010`	fpga1acel_mprt register am_adbase_mem_mem0_sprt_memspace1b_0
`bridge_fpga1acel_mprt_4_118_am_adbase_mem_mem0_sprt_memspace1c_0`	`0x00010600`	`64`	`RW`	`0x0000000400000010`	fpga1acel_mprt register am_adbase_mem_mem0_sprt_memspace1c_0
`bridge_fpga1acel_mprt_4_118_am_adbase_mem_mem0_sprt_memspace1d_0`	`0x00010620`	`64`	`RW`	`0x0000000800000010`	fpga1acel_mprt register am_adbase_mem_mem0_sprt_memspace1d_0
`bridge_fpga1acel_mprt_4_118_am_adbase_mem_mem0_sprt_memspace1e_0`	`0x00010640`	`64`	`RW`	`0x0000001000000010`	fpga1acel_mprt register am_adbase_mem_mem0_sprt_memspace1e_0
`bridge_fpga1acel_mprt_4_118_am_adbase_mem_ram_sprt_ramspace0_0`	`0x00010660`	`64`	`RW`	`0x00000000FFE00001`	fpga1acel_mprt register am_adbase_mem_ram_sprt_ramspace0_0
`bridge_fpga1acel_mprt_4_118_am_adbase_mem_ram_sprt_ramspace1_0`	`0x00010680`	`64`	`RW`	`0x00000000FFE40010`	fpga1acel_mprt register am_adbase_mem_ram_sprt_ramspace1_0
`bridge_fpga1acel_mprt_4_118_am_adbase_mem_ram_sprt_ramspace2_0`	`0x000106A0`	`64`	`RW`	`0x00000000FFE80010`	fpga1acel_mprt register am_adbase_mem_ram_sprt_ramspace2_0
`bridge_fpga1acel_mprt_4_118_am_adbase_mem_ram_sprt_ramspace3_0`	`0x000106C0`	`64`	`RW`	`0x00000000FFEA0010`	fpga1acel_mprt register am_adbase_mem_ram_sprt_ramspace3_0
`bridge_fpga1acel_mprt_4_118_am_adbase_mem_ram_sprt_ramspace4_0`	`0x000106E0`	`64`	`RW`	`0x00000000FFEC0010`	fpga1acel_mprt register am_adbase_mem_ram_sprt_ramspace4_0
`bridge_fpga1acel_mprt_4_118_am_adbase_mem_ram_sprt_ramspace5_0`	`0x00010700`	`64`	`RW`	`0x00000000FFEE0010`	fpga1acel_mprt register am_adbase_mem_ram_sprt_ramspace5_0
`bridge_fpga1acel_mprt_4_118_am_admask_mem_ddrreg_sprt_ddrregspace0_0`	`0x00010408`	`64`	`RW`	`0x000000FFFF000000`	fpga1acel_mprt register am_admask_mem_ddrreg_sprt_ddrregspace0_0
`bridge_fpga1acel_mprt_4_118_am_admask_mem_ios_sprt_iospace0a_0`	`0x00010428`	`64`	`RW`	`0x000000FFC0000000`	fpga1acel_mprt register am_admask_mem_ios_sprt_iospace0a_0
`bridge_fpga1acel_mprt_4_118_am_admask_mem_ios_sprt_iospace0b_0`	`0x00010448`	`64`	`RW`	`0x000000FFE0000000`	fpga1acel_mprt register am_admask_mem_ios_sprt_iospace0b_0
`bridge_fpga1acel_mprt_4_118_am_admask_mem_ios_sprt_iospace1a_0`	`0x00010468`	`64`	`RW`	`0x000000FFFF000000`	fpga1acel_mprt register am_admask_mem_ios_sprt_iospace1a_0
`bridge_fpga1acel_mprt_4_118_am_admask_mem_ios_sprt_iospace1b_0`	`0x00010488`	`64`	`RW`	`0x000000FFFE000000`	fpga1acel_mprt register am_admask_mem_ios_sprt_iospace1b_0
`bridge_fpga1acel_mprt_4_118_am_admask_mem_ios_sprt_iospace1c_0`	`0x000104A8`	`64`	`RW`	`0x000000FFFE000000`	fpga1acel_mprt register am_admask_mem_ios_sprt_iospace1c_0
`bridge_fpga1acel_mprt_4_118_am_admask_mem_ios_sprt_iospace1d_0`	`0x000104C8`	`64`	`RW`	`0x000000FFFF000000`	fpga1acel_mprt register am_admask_mem_ios_sprt_iospace1d_0
`bridge_fpga1acel_mprt_4_118_am_admask_mem_ios_sprt_iospace1e_0`	`0x000104E8`	`64`	`RW`	`0x000000FFFF800000`	fpga1acel_mprt register am_admask_mem_ios_sprt_iospace1e_0
`bridge_fpga1acel_mprt_4_118_am_admask_mem_ios_sprt_iospace1f_0`	`0x00010508`	`64`	`RW`	`0x000000FFFFC00000`	fpga1acel_mprt register am_admask_mem_ios_sprt_iospace1f_0
`bridge_fpga1acel_mprt_4_118_am_admask_mem_ios_sprt_iospace1g_0`	`0x00010528`	`64`	`RW`	`0x000000FFFFE00000`	fpga1acel_mprt register am_admask_mem_ios_sprt_iospace1g_0
`bridge_fpga1acel_mprt_4_118_am_admask_mem_ios_sprt_iospace2a_0`	`0x00010548`	`64`	`RW`	`0x000000E000000000`	fpga1acel_mprt register am_admask_mem_ios_sprt_iospace2a_0
`bridge_fpga1acel_mprt_4_118_am_admask_mem_ios_sprt_iospace2b_0`	`0x00010568`	`64`	`RW`	`0x000000C000000000`	fpga1acel_mprt register am_admask_mem_ios_sprt_iospace2b_0
`bridge_fpga1acel_mprt_4_118_am_admask_mem_ios_sprt_iospace2c_0`	`0x00010588`	`64`	`RW`	`0x0000008000000000`	fpga1acel_mprt register am_admask_mem_ios_sprt_iospace2c_0
`bridge_fpga1acel_mprt_4_118_am_admask_mem_mem0_sprt_memspace0_0`	`0x000105A8`	`64`	`RW`	`0x000000FF80000000`	fpga1acel_mprt register am_admask_mem_mem0_sprt_memspace0_0
`bridge_fpga1acel_mprt_4_118_am_admask_mem_mem0_sprt_memspace1a_0`	`0x000105C8`	`64`	`RW`	`0x000000FF00000000`	fpga1acel_mprt register am_admask_mem_mem0_sprt_memspace1a_0
`bridge_fpga1acel_mprt_4_118_am_admask_mem_mem0_sprt_memspace1b_0`	`0x000105E8`	`64`	`RW`	`0x000000FE00000000`	fpga1acel_mprt register am_admask_mem_mem0_sprt_memspace1b_0
`bridge_fpga1acel_mprt_4_118_am_admask_mem_mem0_sprt_memspace1c_0`	`0x00010608`	`64`	`RW`	`0x000000FC00000000`	fpga1acel_mprt register am_admask_mem_mem0_sprt_memspace1c_0
`bridge_fpga1acel_mprt_4_118_am_admask_mem_mem0_sprt_memspace1d_0`	`0x00010628`	`64`	`RW`	`0x000000F800000000`	fpga1acel_mprt register am_admask_mem_mem0_sprt_memspace1d_0
`bridge_fpga1acel_mprt_4_118_am_admask_mem_mem0_sprt_memspace1e_0`	`0x00010648`	`64`	`RW`	`0x000000F000000000`	fpga1acel_mprt register am_admask_mem_mem0_sprt_memspace1e_0
`bridge_fpga1acel_mprt_4_118_am_admask_mem_ram_sprt_ramspace0_0`	`0x00010668`	`64`	`RW`	`0x000000FFFFFC0003`	fpga1acel_mprt register am_admask_mem_ram_sprt_ramspace0_0
`bridge_fpga1acel_mprt_4_118_am_admask_mem_ram_sprt_ramspace1_0`	`0x00010688`	`64`	`RW`	`0x000000FFFFFC0000`	fpga1acel_mprt register am_admask_mem_ram_sprt_ramspace1_0
`bridge_fpga1acel_mprt_4_118_am_admask_mem_ram_sprt_ramspace2_0`	`0x000106A8`	`64`	`RW`	`0x000000FFFFFE0000`	fpga1acel_mprt register am_admask_mem_ram_sprt_ramspace2_0
`bridge_fpga1acel_mprt_4_118_am_admask_mem_ram_sprt_ramspace3_0`	`0x000106C8`	`64`	`RW`	`0x000000FFFFFE0000`	fpga1acel_mprt register am_admask_mem_ram_sprt_ramspace3_0
`bridge_fpga1acel_mprt_4_118_am_admask_mem_ram_sprt_ramspace4_0`	`0x000106E8`	`64`	`RW`	`0x000000FFFFFE0000`	fpga1acel_mprt register am_admask_mem_ram_sprt_ramspace4_0
`bridge_fpga1acel_mprt_4_118_am_admask_mem_ram_sprt_ramspace5_0`	`0x00010708`	`64`	`RW`	`0x000000FFFFFE0000`	fpga1acel_mprt register am_admask_mem_ram_sprt_ramspace5_0
`bridge_fpga1acel_mprt_4_118_am_bridge_id`	`0x00013D08`	`64`	`RO`	`0x0000000000000004`	fpga1acel_mprt register am_bridge_id
`bridge_fpga1acel_mprt_4_118_am_err`	`0x00013E00`	`64`	`RW`	`0x0000000000000000`	fpga1acel_mprt register am_err
`bridge_fpga1acel_mprt_4_118_am_intm`	`0x00013E40`	`64`	`RW`	`0x00000007004F004F`	fpga1acel_mprt register am_intm
`bridge_fpga1acel_mprt_4_118_am_sts`	`0x00013D00`	`64`	`RO`	`0x000000000000000C`	fpga1acel_mprt register am_sts
`bridge_fpga1acel_mprt_4_118_brs_0`	`0x00010130`	`32`	`RO`	`0x00000000`	fpga1acel_mprt register brs_0
`bridge_fpga1acel_mprt_4_118_brs_1`	`0x00010138`	`32`	`RO`	`0x00000000`	fpga1acel_mprt register brs_1
`bridge_fpga1acel_mprt_4_118_brs_10`	`0x00010180`	`32`	`RO`	`0x00000000`	fpga1acel_mprt register brs_10
`bridge_fpga1acel_mprt_4_118_brs_11`	`0x00010188`	`32`	`RO`	`0x00000000`	fpga1acel_mprt register brs_11
`bridge_fpga1acel_mprt_4_118_brs_12`	`0x00010190`	`32`	`RO`	`0x00000000`	fpga1acel_mprt register brs_12
`bridge_fpga1acel_mprt_4_118_brs_13`	`0x00010198`	`32`	`RO`	`0x00000000`	fpga1acel_mprt register brs_13
`bridge_fpga1acel_mprt_4_118_brs_14`	`0x000101A0`	`32`	`RO`	`0x00000000`	fpga1acel_mprt register brs_14
`bridge_fpga1acel_mprt_4_118_brs_15`	`0x000101A8`	`32`	`RO`	`0x00000000`	fpga1acel_mprt register brs_15
`bridge_fpga1acel_mprt_4_118_brs_2`	`0x00010140`	`32`	`RO`	`0x00000000`	fpga1acel_mprt register brs_2
`bridge_fpga1acel_mprt_4_118_brs_3`	`0x00010148`	`32`	`RO`	`0x00000000`	fpga1acel_mprt register brs_3
`bridge_fpga1acel_mprt_4_118_brs_4`	`0x00010150`	`32`	`RO`	`0x00000000`	fpga1acel_mprt register brs_4
`bridge_fpga1acel_mprt_4_118_brs_5`	`0x00010158`	`32`	`RO`	`0x00000000`	fpga1acel_mprt register brs_5
`bridge_fpga1acel_mprt_4_118_brs_6`	`0x00010160`	`32`	`RO`	`0x00000000`	fpga1acel_mprt register brs_6
`bridge_fpga1acel_mprt_4_118_brs_7`	`0x00010168`	`32`	`RO`	`0x00000000`	fpga1acel_mprt register brs_7
`bridge_fpga1acel_mprt_4_118_brs_8`	`0x00010170`	`32`	`RO`	`0x00000000`	fpga1acel_mprt register brs_8
`bridge_fpga1acel_mprt_4_118_brs_9`	`0x00010178`	`32`	`RO`	`0x00000000`	fpga1acel_mprt register brs_9
`bridge_fpga1acel_mprt_4_118_brus`	`0x000101B0`	`32`	`RO`	`0x00000000`	fpga1acel_mprt register brus
`bridge_fpga1acel_mprt_4_118_btrl_0`	`0x00010080`	`32`	`RW`	`0x001400FF`	fpga1acel_mprt register btrl_0
`bridge_fpga1acel_mprt_4_118_btrl_1`	`0x00010088`	`32`	`RW`	`0x001400FF`	fpga1acel_mprt register btrl_1
`bridge_fpga1acel_mprt_4_118_btrl_2`	`0x00010090`	`32`	`RW`	`0x001400FF`	fpga1acel_mprt register btrl_2
`bridge_fpga1acel_mprt_4_118_btrl_3`	`0x00010098`	`32`	`RW`	`0x00000000`	fpga1acel_mprt register btrl_3
`bridge_fpga1acel_mprt_4_118_btus_0`	`0x00010058`	`32`	`RO`	`0x00000000`	fpga1acel_mprt register btus_0
`bridge_fpga1acel_mprt_4_118_btus_1`	`0x00010060`	`32`	`RO`	`0x00000000`	fpga1acel_mprt register btus_1
`bridge_fpga1acel_mprt_4_118_p_0`	`0x00010000`	`32`	`RW`	`0x03030303`	fpga1acel_mprt register p_0
`bridge_fpga1acel_mprt_4_118_p_1`	`0x00010008`	`32`	`RW`	`0x03030303`	fpga1acel_mprt register p_1
`bridge_fpga1acel_mprt_4_118_p_2`	`0x00010010`	`32`	`RW`	`0x03030303`	fpga1acel_mprt register p_2
`bridge_fpga1acel_mprt_4_118_p_3`	`0x00010018`	`32`	`RW`	`0x03030303`	fpga1acel_mprt register p_3
`bridge_fpga1acel_mprt_4_118_rxid`	`0x000101B8`	`32`	`RO`	`0x00000004`	fpga1acel_mprt register rxid
`bridge_fpga1acel_mprt_4_118_txid`	`0x00010078`	`32`	`RO`	`0x00000004`	fpga1acel_mprt register txid
`bridge_gic_sprt_10_100_as_bridge_id`	`0x00015D08`	`64`	`RO`	`0x000000000000000A`	gic_sprt register as_bridge_id
`bridge_gic_sprt_10_100_as_err`	`0x00015E00`	`64`	`RW`	`0x0000000000000000`	gic_sprt register as_err
`bridge_gic_sprt_10_100_as_intm`	`0x00015E40`	`64`	`RW`	`0x00000001000B0013`	gic_sprt register as_intm
`bridge_gic_sprt_10_100_as_sts`	`0x00015D00`	`64`	`RO`	`0x000000000000000C`	gic_sprt register as_sts
`bridge_gic_sprt_10_100_brs_0`	`0x00014130`	`32`	`RO`	`0x00000000`	gic_sprt register brs_0
`bridge_gic_sprt_10_100_brs_1`	`0x00014138`	`32`	`RO`	`0x00000000`	gic_sprt register brs_1
`bridge_gic_sprt_10_100_brs_10`	`0x00014180`	`32`	`RO`	`0x00000000`	gic_sprt register brs_10
`bridge_gic_sprt_10_100_brs_11`	`0x00014188`	`32`	`RO`	`0x00000000`	gic_sprt register brs_11
`bridge_gic_sprt_10_100_brs_12`	`0x00014190`	`32`	`RO`	`0x00000000`	gic_sprt register brs_12
`bridge_gic_sprt_10_100_brs_13`	`0x00014198`	`32`	`RO`	`0x00000000`	gic_sprt register brs_13
`bridge_gic_sprt_10_100_brs_14`	`0x000141A0`	`32`	`RO`	`0x00000000`	gic_sprt register brs_14
`bridge_gic_sprt_10_100_brs_15`	`0x000141A8`	`32`	`RO`	`0x00000000`	gic_sprt register brs_15
`bridge_gic_sprt_10_100_brs_2`	`0x00014140`	`32`	`RO`	`0x00000000`	gic_sprt register brs_2
`bridge_gic_sprt_10_100_brs_3`	`0x00014148`	`32`	`RO`	`0x00000000`	gic_sprt register brs_3
`bridge_gic_sprt_10_100_brs_4`	`0x00014150`	`32`	`RO`	`0x00000000`	gic_sprt register brs_4
`bridge_gic_sprt_10_100_brs_5`	`0x00014158`	`32`	`RO`	`0x00000000`	gic_sprt register brs_5
`bridge_gic_sprt_10_100_brs_6`	`0x00014160`	`32`	`RO`	`0x00000000`	gic_sprt register brs_6
`bridge_gic_sprt_10_100_brs_7`	`0x00014168`	`32`	`RO`	`0x00000000`	gic_sprt register brs_7
`bridge_gic_sprt_10_100_brs_8`	`0x00014170`	`32`	`RO`	`0x00000000`	gic_sprt register brs_8
`bridge_gic_sprt_10_100_brs_9`	`0x00014178`	`32`	`RO`	`0x00000000`	gic_sprt register brs_9
`bridge_gic_sprt_10_100_brus`	`0x000141B0`	`32`	`RO`	`0x00000000`	gic_sprt register brus
`bridge_gic_sprt_10_100_btrl_0`	`0x00014080`	`32`	`RW`	`0x001400FF`	gic_sprt register btrl_0
`bridge_gic_sprt_10_100_btrl_1`	`0x00014088`	`32`	`RW`	`0x001400FF`	gic_sprt register btrl_1
`bridge_gic_sprt_10_100_btrl_2`	`0x00014090`	`32`	`RW`	`0x00000000`	gic_sprt register btrl_2
`bridge_gic_sprt_10_100_btrl_3`	`0x00014098`	`32`	`RW`	`0x00000000`	gic_sprt register btrl_3
`bridge_gic_sprt_10_100_btus_0`	`0x00014058`	`32`	`RO`	`0x00000000`	gic_sprt register btus_0
`bridge_gic_sprt_10_100_btus_1`	`0x00014060`	`32`	`RO`	`0x00000000`	gic_sprt register btus_1
`bridge_gic_sprt_10_100_p_0`	`0x00014000`	`32`	`RW`	`0x03030303`	gic_sprt register p_0
`bridge_gic_sprt_10_100_p_1`	`0x00014008`	`32`	`RW`	`0x03030303`	gic_sprt register p_1
`bridge_gic_sprt_10_100_p_2`	`0x00014010`	`32`	`RW`	`0x03030303`	gic_sprt register p_2
`bridge_gic_sprt_10_100_p_3`	`0x00014018`	`32`	`RW`	`0x03030303`	gic_sprt register p_3
`bridge_gic_sprt_10_100_rxid`	`0x000141B8`	`32`	`RO`	`0x0000000A`	gic_sprt register rxid
`bridge_gic_sprt_10_100_txid`	`0x00014078`	`32`	`RO`	`0x0000000A`	gic_sprt register txid
`bridge_iocb0_mprt_2_82_SYSCOACK_reg`	`0x00047F78`	`64`	`RO`	`0x0000000000000000`	iocb0_mprt register SYSCOACK_reg
`bridge_iocb0_mprt_2_82_am_adbase_mem_ios_sprt_iospace0a_0`	`0x00044400`	`64`	`RW`	`0x0000000080000000`	iocb0_mprt register am_adbase_mem_ios_sprt_iospace0a_0
`bridge_iocb0_mprt_2_82_am_adbase_mem_ios_sprt_iospace0b_0`	`0x00044420`	`64`	`RW`	`0x00000000C0000000`	iocb0_mprt register am_adbase_mem_ios_sprt_iospace0b_0
`bridge_iocb0_mprt_2_82_am_adbase_mem_ios_sprt_iospace1a_0`	`0x00044440`	`64`	`RW`	`0x00000000F9000000`	iocb0_mprt register am_adbase_mem_ios_sprt_iospace1a_0
`bridge_iocb0_mprt_2_82_am_adbase_mem_ios_sprt_iospace1b_0`	`0x00044460`	`64`	`RW`	`0x00000000FA000000`	iocb0_mprt register am_adbase_mem_ios_sprt_iospace1b_0
`bridge_iocb0_mprt_2_82_am_adbase_mem_ios_sprt_iospace1c_0`	`0x00044480`	`64`	`RW`	`0x00000000FC000000`	iocb0_mprt register am_adbase_mem_ios_sprt_iospace1c_0
`bridge_iocb0_mprt_2_82_am_adbase_mem_ios_sprt_iospace1d_0`	`0x000444A0`	`64`	`RW`	`0x00000000FE000000`	iocb0_mprt register am_adbase_mem_ios_sprt_iospace1d_0
`bridge_iocb0_mprt_2_82_am_adbase_mem_ios_sprt_iospace1e_0`	`0x000444C0`	`64`	`RW`	`0x00000000FF000000`	iocb0_mprt register am_adbase_mem_ios_sprt_iospace1e_0
`bridge_iocb0_mprt_2_82_am_adbase_mem_ios_sprt_iospace1f_0`	`0x000444E0`	`64`	`RW`	`0x00000000FF800000`	iocb0_mprt register am_adbase_mem_ios_sprt_iospace1f_0
`bridge_iocb0_mprt_2_82_am_adbase_mem_ios_sprt_iospace1g_0`	`0x00044500`	`64`	`RW`	`0x00000000FFC00000`	iocb0_mprt register am_adbase_mem_ios_sprt_iospace1g_0
`bridge_iocb0_mprt_2_82_am_adbase_mem_mem0_sprt_memspace0_0`	`0x00044520`	`64`	`RW`	`0x0000000000000000`	iocb0_mprt register am_adbase_mem_mem0_sprt_memspace0_0
`bridge_iocb0_mprt_2_82_am_adbase_mem_mem0_sprt_memspace1a_0`	`0x00044540`	`64`	`RW`	`0x0000000100000000`	iocb0_mprt register am_adbase_mem_mem0_sprt_memspace1a_0
`bridge_iocb0_mprt_2_82_am_adbase_mem_mem0_sprt_memspace1b_0`	`0x00044560`	`64`	`RW`	`0x0000000200000000`	iocb0_mprt register am_adbase_mem_mem0_sprt_memspace1b_0
`bridge_iocb0_mprt_2_82_am_adbase_mem_mem0_sprt_memspace1c_0`	`0x00044580`	`64`	`RW`	`0x0000000400000000`	iocb0_mprt register am_adbase_mem_mem0_sprt_memspace1c_0
`bridge_iocb0_mprt_2_82_am_adbase_mem_mem0_sprt_memspace1d_0`	`0x000445A0`	`64`	`RW`	`0x0000000800000000`	iocb0_mprt register am_adbase_mem_mem0_sprt_memspace1d_0
`bridge_iocb0_mprt_2_82_am_adbase_mem_mem0_sprt_memspace1e_0`	`0x000445C0`	`64`	`RW`	`0x0000001000000000`	iocb0_mprt register am_adbase_mem_mem0_sprt_memspace1e_0
`bridge_iocb0_mprt_2_82_am_adbase_mem_ram_sprt_ramspace0_0`	`0x000445E0`	`64`	`RW`	`0x00000000FFE00000`	iocb0_mprt register am_adbase_mem_ram_sprt_ramspace0_0
`bridge_iocb0_mprt_2_82_am_adbase_mem_ram_sprt_ramspace1_0`	`0x00044600`	`64`	`RW`	`0x00000000FFE40000`	iocb0_mprt register am_adbase_mem_ram_sprt_ramspace1_0
`bridge_iocb0_mprt_2_82_am_adbase_mem_ram_sprt_ramspace2_0`	`0x00044620`	`64`	`RW`	`0x00000000FFE80000`	iocb0_mprt register am_adbase_mem_ram_sprt_ramspace2_0
`bridge_iocb0_mprt_2_82_am_adbase_mem_ram_sprt_ramspace3_0`	`0x00044640`	`64`	`RW`	`0x00000000FFEA0000`	iocb0_mprt register am_adbase_mem_ram_sprt_ramspace3_0
`bridge_iocb0_mprt_2_82_am_adbase_mem_ram_sprt_ramspace4_0`	`0x00044660`	`64`	`RW`	`0x00000000FFEC0000`	iocb0_mprt register am_adbase_mem_ram_sprt_ramspace4_0
`bridge_iocb0_mprt_2_82_am_adbase_mem_ram_sprt_ramspace5_0`	`0x00044680`	`64`	`RW`	`0x00000000FFEE0000`	iocb0_mprt register am_adbase_mem_ram_sprt_ramspace5_0
`bridge_iocb0_mprt_2_82_am_admask_mem_ios_sprt_iospace0a_0`	`0x00044408`	`64`	`RW`	`0x00000FFFC0000000`	iocb0_mprt register am_admask_mem_ios_sprt_iospace0a_0
`bridge_iocb0_mprt_2_82_am_admask_mem_ios_sprt_iospace0b_0`	`0x00044428`	`64`	`RW`	`0x00000FFFE0000000`	iocb0_mprt register am_admask_mem_ios_sprt_iospace0b_0
`bridge_iocb0_mprt_2_82_am_admask_mem_ios_sprt_iospace1a_0`	`0x00044448`	`64`	`RW`	`0x00000FFFFF000000`	iocb0_mprt register am_admask_mem_ios_sprt_iospace1a_0
`bridge_iocb0_mprt_2_82_am_admask_mem_ios_sprt_iospace1b_0`	`0x00044468`	`64`	`RW`	`0x00000FFFFE000000`	iocb0_mprt register am_admask_mem_ios_sprt_iospace1b_0
`bridge_iocb0_mprt_2_82_am_admask_mem_ios_sprt_iospace1c_0`	`0x00044488`	`64`	`RW`	`0x00000FFFFE000000`	iocb0_mprt register am_admask_mem_ios_sprt_iospace1c_0
`bridge_iocb0_mprt_2_82_am_admask_mem_ios_sprt_iospace1d_0`	`0x000444A8`	`64`	`RW`	`0x00000FFFFF000000`	iocb0_mprt register am_admask_mem_ios_sprt_iospace1d_0
`bridge_iocb0_mprt_2_82_am_admask_mem_ios_sprt_iospace1e_0`	`0x000444C8`	`64`	`RW`	`0x00000FFFFF800000`	iocb0_mprt register am_admask_mem_ios_sprt_iospace1e_0
`bridge_iocb0_mprt_2_82_am_admask_mem_ios_sprt_iospace1f_0`	`0x000444E8`	`64`	`RW`	`0x00000FFFFFC00000`	iocb0_mprt register am_admask_mem_ios_sprt_iospace1f_0
`bridge_iocb0_mprt_2_82_am_admask_mem_ios_sprt_iospace1g_0`	`0x00044508`	`64`	`RW`	`0x00000FFFFFE00000`	iocb0_mprt register am_admask_mem_ios_sprt_iospace1g_0
`bridge_iocb0_mprt_2_82_am_admask_mem_mem0_sprt_memspace0_0`	`0x00044528`	`64`	`RW`	`0x00000FFF80000000`	iocb0_mprt register am_admask_mem_mem0_sprt_memspace0_0
`bridge_iocb0_mprt_2_82_am_admask_mem_mem0_sprt_memspace1a_0`	`0x00044548`	`64`	`RW`	`0x00000FFF00000000`	iocb0_mprt register am_admask_mem_mem0_sprt_memspace1a_0
`bridge_iocb0_mprt_2_82_am_admask_mem_mem0_sprt_memspace1b_0`	`0x00044568`	`64`	`RW`	`0x00000FFE00000000`	iocb0_mprt register am_admask_mem_mem0_sprt_memspace1b_0
`bridge_iocb0_mprt_2_82_am_admask_mem_mem0_sprt_memspace1c_0`	`0x00044588`	`64`	`RW`	`0x00000FFC00000000`	iocb0_mprt register am_admask_mem_mem0_sprt_memspace1c_0
`bridge_iocb0_mprt_2_82_am_admask_mem_mem0_sprt_memspace1d_0`	`0x000445A8`	`64`	`RW`	`0x00000FF800000000`	iocb0_mprt register am_admask_mem_mem0_sprt_memspace1d_0
`bridge_iocb0_mprt_2_82_am_admask_mem_mem0_sprt_memspace1e_0`	`0x000445C8`	`64`	`RW`	`0x00000FF000000000`	iocb0_mprt register am_admask_mem_mem0_sprt_memspace1e_0
`bridge_iocb0_mprt_2_82_am_admask_mem_ram_sprt_ramspace0_0`	`0x000445E8`	`64`	`RW`	`0x00000FFFFFFC0000`	iocb0_mprt register am_admask_mem_ram_sprt_ramspace0_0
`bridge_iocb0_mprt_2_82_am_admask_mem_ram_sprt_ramspace1_0`	`0x00044608`	`64`	`RW`	`0x00000FFFFFFC0000`	iocb0_mprt register am_admask_mem_ram_sprt_ramspace1_0
`bridge_iocb0_mprt_2_82_am_admask_mem_ram_sprt_ramspace2_0`	`0x00044628`	`64`	`RW`	`0x00000FFFFFFE0000`	iocb0_mprt register am_admask_mem_ram_sprt_ramspace2_0
`bridge_iocb0_mprt_2_82_am_admask_mem_ram_sprt_ramspace3_0`	`0x00044648`	`64`	`RW`	`0x00000FFFFFFE0000`	iocb0_mprt register am_admask_mem_ram_sprt_ramspace3_0
`bridge_iocb0_mprt_2_82_am_admask_mem_ram_sprt_ramspace4_0`	`0x00044668`	`64`	`RW`	`0x00000FFFFFFE0000`	iocb0_mprt register am_admask_mem_ram_sprt_ramspace4_0
`bridge_iocb0_mprt_2_82_am_admask_mem_ram_sprt_ramspace5_0`	`0x00044688`	`64`	`RW`	`0x00000FFFFFFE0000`	iocb0_mprt register am_admask_mem_ram_sprt_ramspace5_0
`bridge_iocb0_mprt_2_82_am_bridge_id`	`0x00047D08`	`64`	`RO`	`0x0000000000000002`	iocb0_mprt register am_bridge_id
`bridge_iocb0_mprt_2_82_am_err`	`0x00047E00`	`64`	`RW`	`0x0000000000000000`	iocb0_mprt register am_err
`bridge_iocb0_mprt_2_82_am_intm`	`0x00047E40`	`64`	`RW`	`0x0000000700490049`	iocb0_mprt register am_intm
`bridge_iocb0_mprt_2_82_am_sts`	`0x00047D00`	`64`	`RO`	`0x000000000000000C`	iocb0_mprt register am_sts
`bridge_iocb0_mprt_2_82_brs_0`	`0x00044130`	`32`	`RO`	`0x00000000`	iocb0_mprt register brs_0
`bridge_iocb0_mprt_2_82_brs_1`	`0x00044138`	`32`	`RO`	`0x00000000`	iocb0_mprt register brs_1
`bridge_iocb0_mprt_2_82_brs_10`	`0x00044180`	`32`	`RO`	`0x00000000`	iocb0_mprt register brs_10
`bridge_iocb0_mprt_2_82_brs_11`	`0x00044188`	`32`	`RO`	`0x00000000`	iocb0_mprt register brs_11
`bridge_iocb0_mprt_2_82_brs_12`	`0x00044190`	`32`	`RO`	`0x00000000`	iocb0_mprt register brs_12
`bridge_iocb0_mprt_2_82_brs_13`	`0x00044198`	`32`	`RO`	`0x00000000`	iocb0_mprt register brs_13
`bridge_iocb0_mprt_2_82_brs_14`	`0x000441A0`	`32`	`RO`	`0x00000000`	iocb0_mprt register brs_14
`bridge_iocb0_mprt_2_82_brs_15`	`0x000441A8`	`32`	`RO`	`0x00000000`	iocb0_mprt register brs_15
`bridge_iocb0_mprt_2_82_brs_2`	`0x00044140`	`32`	`RO`	`0x00000000`	iocb0_mprt register brs_2
`bridge_iocb0_mprt_2_82_brs_3`	`0x00044148`	`32`	`RO`	`0x00000000`	iocb0_mprt register brs_3
`bridge_iocb0_mprt_2_82_brs_4`	`0x00044150`	`32`	`RO`	`0x00000000`	iocb0_mprt register brs_4
`bridge_iocb0_mprt_2_82_brs_5`	`0x00044158`	`32`	`RO`	`0x00000000`	iocb0_mprt register brs_5
`bridge_iocb0_mprt_2_82_brs_6`	`0x00044160`	`32`	`RO`	`0x00000000`	iocb0_mprt register brs_6
`bridge_iocb0_mprt_2_82_brs_7`	`0x00044168`	`32`	`RO`	`0x00000000`	iocb0_mprt register brs_7
`bridge_iocb0_mprt_2_82_brs_8`	`0x00044170`	`32`	`RO`	`0x00000000`	iocb0_mprt register brs_8
`bridge_iocb0_mprt_2_82_brs_9`	`0x00044178`	`32`	`RO`	`0x00000000`	iocb0_mprt register brs_9
`bridge_iocb0_mprt_2_82_brus`	`0x000441B0`	`32`	`RO`	`0x00000000`	iocb0_mprt register brus
`bridge_iocb0_mprt_2_82_btrl_0`	`0x00044080`	`32`	`RW`	`0x001400FF`	iocb0_mprt register btrl_0
`bridge_iocb0_mprt_2_82_btrl_1`	`0x00044088`	`32`	`RW`	`0x001400FF`	iocb0_mprt register btrl_1
`bridge_iocb0_mprt_2_82_btrl_2`	`0x00044090`	`32`	`RW`	`0x001400FF`	iocb0_mprt register btrl_2
`bridge_iocb0_mprt_2_82_btrl_3`	`0x00044098`	`32`	`RW`	`0x001400FF`	iocb0_mprt register btrl_3
`bridge_iocb0_mprt_2_82_btus_0`	`0x00044058`	`32`	`RO`	`0x00000000`	iocb0_mprt register btus_0
`bridge_iocb0_mprt_2_82_btus_1`	`0x00044060`	`32`	`RO`	`0x00000000`	iocb0_mprt register btus_1
`bridge_iocb0_mprt_2_82_p_0`	`0x00044000`	`32`	`RW`	`0x03030303`	iocb0_mprt register p_0
`bridge_iocb0_mprt_2_82_p_1`	`0x00044008`	`32`	`RW`	`0x03030303`	iocb0_mprt register p_1
`bridge_iocb0_mprt_2_82_p_2`	`0x00044010`	`32`	`RW`	`0x03030303`	iocb0_mprt register p_2
`bridge_iocb0_mprt_2_82_p_3`	`0x00044018`	`32`	`RW`	`0x03030303`	iocb0_mprt register p_3
`bridge_iocb0_mprt_2_82_rxid`	`0x000441B8`	`32`	`RO`	`0x00000002`	iocb0_mprt register rxid
`bridge_iocb0_mprt_2_82_txid`	`0x00044078`	`32`	`RO`	`0x00000002`	iocb0_mprt register txid
`bridge_iocb0_sprt_11_67_as_bridge_id`	`0x00049D08`	`64`	`RO`	`0x000000000000000B`	iocb0_sprt register as_bridge_id
`bridge_iocb0_sprt_11_67_as_err`	`0x00049E00`	`64`	`RW`	`0x0000000000000000`	iocb0_sprt register as_err
`bridge_iocb0_sprt_11_67_as_intm`	`0x00049E40`	`64`	`RW`	`0x00000001000B0013`	iocb0_sprt register as_intm
`bridge_iocb0_sprt_11_67_as_sts`	`0x00049D00`	`64`	`RO`	`0x000000000000000C`	iocb0_sprt register as_sts
`bridge_iocb0_sprt_11_67_brs_0`	`0x00048130`	`32`	`RO`	`0x00000000`	iocb0_sprt register brs_0
`bridge_iocb0_sprt_11_67_brs_1`	`0x00048138`	`32`	`RO`	`0x00000000`	iocb0_sprt register brs_1
`bridge_iocb0_sprt_11_67_brs_10`	`0x00048180`	`32`	`RO`	`0x00000000`	iocb0_sprt register brs_10
`bridge_iocb0_sprt_11_67_brs_11`	`0x00048188`	`32`	`RO`	`0x00000000`	iocb0_sprt register brs_11
`bridge_iocb0_sprt_11_67_brs_12`	`0x00048190`	`32`	`RO`	`0x00000000`	iocb0_sprt register brs_12
`bridge_iocb0_sprt_11_67_brs_13`	`0x00048198`	`32`	`RO`	`0x00000000`	iocb0_sprt register brs_13
`bridge_iocb0_sprt_11_67_brs_14`	`0x000481A0`	`32`	`RO`	`0x00000000`	iocb0_sprt register brs_14
`bridge_iocb0_sprt_11_67_brs_15`	`0x000481A8`	`32`	`RO`	`0x00000000`	iocb0_sprt register brs_15
`bridge_iocb0_sprt_11_67_brs_2`	`0x00048140`	`32`	`RO`	`0x00000000`	iocb0_sprt register brs_2
`bridge_iocb0_sprt_11_67_brs_3`	`0x00048148`	`32`	`RO`	`0x00000000`	iocb0_sprt register brs_3
`bridge_iocb0_sprt_11_67_brs_4`	`0x00048150`	`32`	`RO`	`0x00000000`	iocb0_sprt register brs_4
`bridge_iocb0_sprt_11_67_brs_5`	`0x00048158`	`32`	`RO`	`0x00000000`	iocb0_sprt register brs_5
`bridge_iocb0_sprt_11_67_brs_6`	`0x00048160`	`32`	`RO`	`0x00000000`	iocb0_sprt register brs_6
`bridge_iocb0_sprt_11_67_brs_7`	`0x00048168`	`32`	`RO`	`0x00000000`	iocb0_sprt register brs_7
`bridge_iocb0_sprt_11_67_brs_8`	`0x00048170`	`32`	`RO`	`0x00000000`	iocb0_sprt register brs_8
`bridge_iocb0_sprt_11_67_brs_9`	`0x00048178`	`32`	`RO`	`0x00000000`	iocb0_sprt register brs_9
`bridge_iocb0_sprt_11_67_brus`	`0x000481B0`	`32`	`RO`	`0x00000000`	iocb0_sprt register brus
`bridge_iocb0_sprt_11_67_btrl_0`	`0x00048080`	`32`	`RW`	`0x001400FF`	iocb0_sprt register btrl_0
`bridge_iocb0_sprt_11_67_btrl_1`	`0x00048088`	`32`	`RW`	`0x001400FF`	iocb0_sprt register btrl_1
`bridge_iocb0_sprt_11_67_btrl_2`	`0x00048090`	`32`	`RW`	`0x00000000`	iocb0_sprt register btrl_2
`bridge_iocb0_sprt_11_67_btrl_3`	`0x00048098`	`32`	`RW`	`0x00000000`	iocb0_sprt register btrl_3
`bridge_iocb0_sprt_11_67_btus_0`	`0x00048058`	`32`	`RO`	`0x00000000`	iocb0_sprt register btus_0
`bridge_iocb0_sprt_11_67_btus_1`	`0x00048060`	`32`	`RO`	`0x00000000`	iocb0_sprt register btus_1
`bridge_iocb0_sprt_11_67_p_0`	`0x00048000`	`32`	`RW`	`0x03030303`	iocb0_sprt register p_0
`bridge_iocb0_sprt_11_67_p_1`	`0x00048008`	`32`	`RW`	`0x03030303`	iocb0_sprt register p_1
`bridge_iocb0_sprt_11_67_p_2`	`0x00048010`	`32`	`RW`	`0x03030303`	iocb0_sprt register p_2
`bridge_iocb0_sprt_11_67_p_3`	`0x00048018`	`32`	`RW`	`0x03030303`	iocb0_sprt register p_3
`bridge_iocb0_sprt_11_67_rxid`	`0x000481B8`	`32`	`RO`	`0x0000000B`	iocb0_sprt register rxid
`bridge_iocb0_sprt_11_67_txid`	`0x00048078`	`32`	`RO`	`0x0000000B`	iocb0_sprt register txid
`bridge_iom_mprt_5_63_am_adbase_mem_ddrreg_sprt_ddrregspace0_0`	`0x00018400`	`64`	`RW`	`0x00000000F8000010`	iom_mprt register am_adbase_mem_ddrreg_sprt_ddrregspace0_0
`bridge_iom_mprt_5_63_am_adbase_mem_gic_sprt_gicspace_0`	`0x00018420`	`64`	`RW`	`0x00000000FFFC0000`	iom_mprt register am_adbase_mem_gic_sprt_gicspace_0
`bridge_iom_mprt_5_63_am_adbase_mem_ios_sprt_iospace0a_0`	`0x00018440`	`64`	`RW`	`0x0000000080000000`	iom_mprt register am_adbase_mem_ios_sprt_iospace0a_0
`bridge_iom_mprt_5_63_am_adbase_mem_ios_sprt_iospace0b_0`	`0x00018460`	`64`	`RW`	`0x00000000C0000000`	iom_mprt register am_adbase_mem_ios_sprt_iospace0b_0
`bridge_iom_mprt_5_63_am_adbase_mem_ios_sprt_iospace1a_0`	`0x00018480`	`64`	`RW`	`0x00000000F9000000`	iom_mprt register am_adbase_mem_ios_sprt_iospace1a_0
`bridge_iom_mprt_5_63_am_adbase_mem_ios_sprt_iospace1b_0`	`0x000184A0`	`64`	`RW`	`0x00000000FA000000`	iom_mprt register am_adbase_mem_ios_sprt_iospace1b_0
`bridge_iom_mprt_5_63_am_adbase_mem_ios_sprt_iospace1c_0`	`0x000184C0`	`64`	`RW`	`0x00000000FC000000`	iom_mprt register am_adbase_mem_ios_sprt_iospace1c_0
`bridge_iom_mprt_5_63_am_adbase_mem_ios_sprt_iospace1d_0`	`0x000184E0`	`64`	`RW`	`0x00000000FE000000`	iom_mprt register am_adbase_mem_ios_sprt_iospace1d_0
`bridge_iom_mprt_5_63_am_adbase_mem_ios_sprt_iospace1e_0`	`0x00018500`	`64`	`RW`	`0x00000000FF000000`	iom_mprt register am_adbase_mem_ios_sprt_iospace1e_0
`bridge_iom_mprt_5_63_am_adbase_mem_ios_sprt_iospace1f_0`	`0x00018520`	`64`	`RW`	`0x00000000FF800000`	iom_mprt register am_adbase_mem_ios_sprt_iospace1f_0
`bridge_iom_mprt_5_63_am_adbase_mem_ios_sprt_iospace1g_0`	`0x00018540`	`64`	`RW`	`0x00000000FFC00000`	iom_mprt register am_adbase_mem_ios_sprt_iospace1g_0
`bridge_iom_mprt_5_63_am_adbase_mem_mem0_sprt_memspace0_0`	`0x00018560`	`64`	`RW`	`0x0000000000000010`	iom_mprt register am_adbase_mem_mem0_sprt_memspace0_0
`bridge_iom_mprt_5_63_am_adbase_mem_mem0_sprt_memspace1a_0`	`0x00018580`	`64`	`RW`	`0x0000000100000010`	iom_mprt register am_adbase_mem_mem0_sprt_memspace1a_0
`bridge_iom_mprt_5_63_am_adbase_mem_mem0_sprt_memspace1b_0`	`0x000185A0`	`64`	`RW`	`0x0000000200000010`	iom_mprt register am_adbase_mem_mem0_sprt_memspace1b_0
`bridge_iom_mprt_5_63_am_adbase_mem_mem0_sprt_memspace1c_0`	`0x000185C0`	`64`	`RW`	`0x0000000400000010`	iom_mprt register am_adbase_mem_mem0_sprt_memspace1c_0
`bridge_iom_mprt_5_63_am_adbase_mem_mem0_sprt_memspace1d_0`	`0x000185E0`	`64`	`RW`	`0x0000000800000010`	iom_mprt register am_adbase_mem_mem0_sprt_memspace1d_0
`bridge_iom_mprt_5_63_am_adbase_mem_mem0_sprt_memspace1e_0`	`0x00018600`	`64`	`RW`	`0x0000001000000010`	iom_mprt register am_adbase_mem_mem0_sprt_memspace1e_0
`bridge_iom_mprt_5_63_am_adbase_mem_ram_sprt_ramspace0_0`	`0x00018620`	`64`	`RW`	`0x00000000FFE00001`	iom_mprt register am_adbase_mem_ram_sprt_ramspace0_0
`bridge_iom_mprt_5_63_am_adbase_mem_ram_sprt_ramspace1_0`	`0x00018640`	`64`	`RW`	`0x00000000FFE40010`	iom_mprt register am_adbase_mem_ram_sprt_ramspace1_0
`bridge_iom_mprt_5_63_am_adbase_mem_ram_sprt_ramspace2_0`	`0x00018660`	`64`	`RW`	`0x00000000FFE80010`	iom_mprt register am_adbase_mem_ram_sprt_ramspace2_0
`bridge_iom_mprt_5_63_am_adbase_mem_ram_sprt_ramspace3_0`	`0x00018680`	`64`	`RW`	`0x00000000FFEA0010`	iom_mprt register am_adbase_mem_ram_sprt_ramspace3_0
`bridge_iom_mprt_5_63_am_adbase_mem_ram_sprt_ramspace4_0`	`0x000186A0`	`64`	`RW`	`0x00000000FFEC0010`	iom_mprt register am_adbase_mem_ram_sprt_ramspace4_0
`bridge_iom_mprt_5_63_am_adbase_mem_ram_sprt_ramspace5_0`	`0x000186C0`	`64`	`RW`	`0x00000000FFEE0010`	iom_mprt register am_adbase_mem_ram_sprt_ramspace5_0
`bridge_iom_mprt_5_63_am_adbase_mem_rbm_s_regspace_rd_0`	`0x000186E0`	`64`	`RW`	`0x00000000F7000008`	iom_mprt register am_adbase_mem_rbm_s_regspace_rd_0
`bridge_iom_mprt_5_63_am_adbase_mem_rbm_s_regspace_wr_0`	`0x00018700`	`64`	`RW`	`0x00000000F7000001`	iom_mprt register am_adbase_mem_rbm_s_regspace_wr_0
`bridge_iom_mprt_5_63_am_admask_mem_ddrreg_sprt_ddrregspace0_0`	`0x00018408`	`64`	`RW`	`0x000000FFFF000000`	iom_mprt register am_admask_mem_ddrreg_sprt_ddrregspace0_0
`bridge_iom_mprt_5_63_am_admask_mem_gic_sprt_gicspace_0`	`0x00018428`	`64`	`RW`	`0x000000FFFFFF8000`	iom_mprt register am_admask_mem_gic_sprt_gicspace_0
`bridge_iom_mprt_5_63_am_admask_mem_ios_sprt_iospace0a_0`	`0x00018448`	`64`	`RW`	`0x000000FFC0000000`	iom_mprt register am_admask_mem_ios_sprt_iospace0a_0
`bridge_iom_mprt_5_63_am_admask_mem_ios_sprt_iospace0b_0`	`0x00018468`	`64`	`RW`	`0x000000FFE0000000`	iom_mprt register am_admask_mem_ios_sprt_iospace0b_0
`bridge_iom_mprt_5_63_am_admask_mem_ios_sprt_iospace1a_0`	`0x00018488`	`64`	`RW`	`0x000000FFFF000000`	iom_mprt register am_admask_mem_ios_sprt_iospace1a_0
`bridge_iom_mprt_5_63_am_admask_mem_ios_sprt_iospace1b_0`	`0x000184A8`	`64`	`RW`	`0x000000FFFE000000`	iom_mprt register am_admask_mem_ios_sprt_iospace1b_0
`bridge_iom_mprt_5_63_am_admask_mem_ios_sprt_iospace1c_0`	`0x000184C8`	`64`	`RW`	`0x000000FFFE000000`	iom_mprt register am_admask_mem_ios_sprt_iospace1c_0
`bridge_iom_mprt_5_63_am_admask_mem_ios_sprt_iospace1d_0`	`0x000184E8`	`64`	`RW`	`0x000000FFFF000000`	iom_mprt register am_admask_mem_ios_sprt_iospace1d_0
`bridge_iom_mprt_5_63_am_admask_mem_ios_sprt_iospace1e_0`	`0x00018508`	`64`	`RW`	`0x000000FFFF800000`	iom_mprt register am_admask_mem_ios_sprt_iospace1e_0
`bridge_iom_mprt_5_63_am_admask_mem_ios_sprt_iospace1f_0`	`0x00018528`	`64`	`RW`	`0x000000FFFFC00000`	iom_mprt register am_admask_mem_ios_sprt_iospace1f_0
`bridge_iom_mprt_5_63_am_admask_mem_ios_sprt_iospace1g_0`	`0x00018548`	`64`	`RW`	`0x000000FFFFE00000`	iom_mprt register am_admask_mem_ios_sprt_iospace1g_0
`bridge_iom_mprt_5_63_am_admask_mem_mem0_sprt_memspace0_0`	`0x00018568`	`64`	`RW`	`0x000000FF80000000`	iom_mprt register am_admask_mem_mem0_sprt_memspace0_0
`bridge_iom_mprt_5_63_am_admask_mem_mem0_sprt_memspace1a_0`	`0x00018588`	`64`	`RW`	`0x000000FF00000000`	iom_mprt register am_admask_mem_mem0_sprt_memspace1a_0
`bridge_iom_mprt_5_63_am_admask_mem_mem0_sprt_memspace1b_0`	`0x000185A8`	`64`	`RW`	`0x000000FE00000000`	iom_mprt register am_admask_mem_mem0_sprt_memspace1b_0
`bridge_iom_mprt_5_63_am_admask_mem_mem0_sprt_memspace1c_0`	`0x000185C8`	`64`	`RW`	`0x000000FC00000000`	iom_mprt register am_admask_mem_mem0_sprt_memspace1c_0
`bridge_iom_mprt_5_63_am_admask_mem_mem0_sprt_memspace1d_0`	`0x000185E8`	`64`	`RW`	`0x000000F800000000`	iom_mprt register am_admask_mem_mem0_sprt_memspace1d_0
`bridge_iom_mprt_5_63_am_admask_mem_mem0_sprt_memspace1e_0`	`0x00018608`	`64`	`RW`	`0x000000F000000000`	iom_mprt register am_admask_mem_mem0_sprt_memspace1e_0
`bridge_iom_mprt_5_63_am_admask_mem_ram_sprt_ramspace0_0`	`0x00018628`	`64`	`RW`	`0x000000FFFFFC0003`	iom_mprt register am_admask_mem_ram_sprt_ramspace0_0
`bridge_iom_mprt_5_63_am_admask_mem_ram_sprt_ramspace1_0`	`0x00018648`	`64`	`RW`	`0x000000FFFFFC0000`	iom_mprt register am_admask_mem_ram_sprt_ramspace1_0
`bridge_iom_mprt_5_63_am_admask_mem_ram_sprt_ramspace2_0`	`0x00018668`	`64`	`RW`	`0x000000FFFFFE0000`	iom_mprt register am_admask_mem_ram_sprt_ramspace2_0
`bridge_iom_mprt_5_63_am_admask_mem_ram_sprt_ramspace3_0`	`0x00018688`	`64`	`RW`	`0x000000FFFFFE0000`	iom_mprt register am_admask_mem_ram_sprt_ramspace3_0
`bridge_iom_mprt_5_63_am_admask_mem_ram_sprt_ramspace4_0`	`0x000186A8`	`64`	`RW`	`0x000000FFFFFE0000`	iom_mprt register am_admask_mem_ram_sprt_ramspace4_0
`bridge_iom_mprt_5_63_am_admask_mem_ram_sprt_ramspace5_0`	`0x000186C8`	`64`	`RW`	`0x000000FFFFFE0000`	iom_mprt register am_admask_mem_ram_sprt_ramspace5_0
`bridge_iom_mprt_5_63_am_admask_mem_rbm_s_regspace_rd_0`	`0x000186E8`	`64`	`RW`	`0x000000FFFF000008`	iom_mprt register am_admask_mem_rbm_s_regspace_rd_0
`bridge_iom_mprt_5_63_am_admask_mem_rbm_s_regspace_wr_0`	`0x00018708`	`64`	`RW`	`0x000000FFFF00000B`	iom_mprt register am_admask_mem_rbm_s_regspace_wr_0
`bridge_iom_mprt_5_63_am_bridge_id`	`0x0001BD08`	`64`	`RO`	`0x0000000000000005`	iom_mprt register am_bridge_id
`bridge_iom_mprt_5_63_am_err`	`0x0001BE00`	`64`	`RW`	`0x0000000000000000`	iom_mprt register am_err
`bridge_iom_mprt_5_63_am_intm`	`0x0001BE40`	`64`	`RW`	`0x00000007004F004F`	iom_mprt register am_intm
`bridge_iom_mprt_5_63_am_sts`	`0x0001BD00`	`64`	`RO`	`0x000000000000000C`	iom_mprt register am_sts
`bridge_iom_mprt_5_63_brs_0`	`0x00018130`	`32`	`RO`	`0x00000000`	iom_mprt register brs_0
`bridge_iom_mprt_5_63_brs_1`	`0x00018138`	`32`	`RO`	`0x00000000`	iom_mprt register brs_1
`bridge_iom_mprt_5_63_brs_10`	`0x00018180`	`32`	`RO`	`0x00000000`	iom_mprt register brs_10
`bridge_iom_mprt_5_63_brs_11`	`0x00018188`	`32`	`RO`	`0x00000000`	iom_mprt register brs_11
`bridge_iom_mprt_5_63_brs_12`	`0x00018190`	`32`	`RO`	`0x00000000`	iom_mprt register brs_12
`bridge_iom_mprt_5_63_brs_13`	`0x00018198`	`32`	`RO`	`0x00000000`	iom_mprt register brs_13
`bridge_iom_mprt_5_63_brs_14`	`0x000181A0`	`32`	`RO`	`0x00000000`	iom_mprt register brs_14
`bridge_iom_mprt_5_63_brs_15`	`0x000181A8`	`32`	`RO`	`0x00000000`	iom_mprt register brs_15
`bridge_iom_mprt_5_63_brs_2`	`0x00018140`	`32`	`RO`	`0x00000000`	iom_mprt register brs_2
`bridge_iom_mprt_5_63_brs_3`	`0x00018148`	`32`	`RO`	`0x00000000`	iom_mprt register brs_3
`bridge_iom_mprt_5_63_brs_4`	`0x00018150`	`32`	`RO`	`0x00000000`	iom_mprt register brs_4
`bridge_iom_mprt_5_63_brs_5`	`0x00018158`	`32`	`RO`	`0x00000000`	iom_mprt register brs_5
`bridge_iom_mprt_5_63_brs_6`	`0x00018160`	`32`	`RO`	`0x00000000`	iom_mprt register brs_6
`bridge_iom_mprt_5_63_brs_7`	`0x00018168`	`32`	`RO`	`0x00000000`	iom_mprt register brs_7
`bridge_iom_mprt_5_63_brs_8`	`0x00018170`	`32`	`RO`	`0x00000000`	iom_mprt register brs_8
`bridge_iom_mprt_5_63_brs_9`	`0x00018178`	`32`	`RO`	`0x00000000`	iom_mprt register brs_9
`bridge_iom_mprt_5_63_brus`	`0x000181B0`	`32`	`RO`	`0x00000000`	iom_mprt register brus
`bridge_iom_mprt_5_63_btrl_0`	`0x00018080`	`32`	`RW`	`0x001400FF`	iom_mprt register btrl_0
`bridge_iom_mprt_5_63_btrl_1`	`0x00018088`	`32`	`RW`	`0x001400FF`	iom_mprt register btrl_1
`bridge_iom_mprt_5_63_btrl_2`	`0x00018090`	`32`	`RW`	`0x001400FF`	iom_mprt register btrl_2
`bridge_iom_mprt_5_63_btrl_3`	`0x00018098`	`32`	`RW`	`0x00000000`	iom_mprt register btrl_3
`bridge_iom_mprt_5_63_btus_0`	`0x00018058`	`32`	`RO`	`0x00000000`	iom_mprt register btus_0
`bridge_iom_mprt_5_63_btus_1`	`0x00018060`	`32`	`RO`	`0x00000000`	iom_mprt register btus_1
`bridge_iom_mprt_5_63_p_0`	`0x00018000`	`32`	`RW`	`0x03030303`	iom_mprt register p_0
`bridge_iom_mprt_5_63_p_1`	`0x00018008`	`32`	`RW`	`0x03030303`	iom_mprt register p_1
`bridge_iom_mprt_5_63_p_2`	`0x00018010`	`32`	`RW`	`0x03030303`	iom_mprt register p_2
`bridge_iom_mprt_5_63_p_3`	`0x00018018`	`32`	`RW`	`0x03030303`	iom_mprt register p_3
`bridge_iom_mprt_5_63_rxid`	`0x000181B8`	`32`	`RO`	`0x00000005`	iom_mprt register rxid
`bridge_iom_mprt_5_63_txid`	`0x00018078`	`32`	`RO`	`0x00000005`	iom_mprt register txid
`bridge_ios_sprt_12_63_as_bridge_id`	`0x0001DD08`	`64`	`RO`	`0x000000000000000C`	ios_sprt register as_bridge_id
`bridge_ios_sprt_12_63_as_err`	`0x0001DE00`	`64`	`RW`	`0x0000000000000000`	ios_sprt register as_err
`bridge_ios_sprt_12_63_as_intm`	`0x0001DE40`	`64`	`RW`	`0x00000001000B0013`	ios_sprt register as_intm
`bridge_ios_sprt_12_63_as_sts`	`0x0001DD00`	`64`	`RO`	`0x000000000000000C`	ios_sprt register as_sts
`bridge_ios_sprt_12_63_brs_0`	`0x0001C130`	`32`	`RO`	`0x00000000`	ios_sprt register brs_0
`bridge_ios_sprt_12_63_brs_1`	`0x0001C138`	`32`	`RO`	`0x00000000`	ios_sprt register brs_1
`bridge_ios_sprt_12_63_brs_10`	`0x0001C180`	`32`	`RO`	`0x00000000`	ios_sprt register brs_10
`bridge_ios_sprt_12_63_brs_11`	`0x0001C188`	`32`	`RO`	`0x00000000`	ios_sprt register brs_11
`bridge_ios_sprt_12_63_brs_12`	`0x0001C190`	`32`	`RO`	`0x00000000`	ios_sprt register brs_12
`bridge_ios_sprt_12_63_brs_13`	`0x0001C198`	`32`	`RO`	`0x00000000`	ios_sprt register brs_13
`bridge_ios_sprt_12_63_brs_14`	`0x0001C1A0`	`32`	`RO`	`0x00000000`	ios_sprt register brs_14
`bridge_ios_sprt_12_63_brs_15`	`0x0001C1A8`	`32`	`RO`	`0x00000000`	ios_sprt register brs_15
`bridge_ios_sprt_12_63_brs_2`	`0x0001C140`	`32`	`RO`	`0x00000000`	ios_sprt register brs_2
`bridge_ios_sprt_12_63_brs_3`	`0x0001C148`	`32`	`RO`	`0x00000000`	ios_sprt register brs_3
`bridge_ios_sprt_12_63_brs_4`	`0x0001C150`	`32`	`RO`	`0x00000000`	ios_sprt register brs_4
`bridge_ios_sprt_12_63_brs_5`	`0x0001C158`	`32`	`RO`	`0x00000000`	ios_sprt register brs_5
`bridge_ios_sprt_12_63_brs_6`	`0x0001C160`	`32`	`RO`	`0x00000000`	ios_sprt register brs_6
`bridge_ios_sprt_12_63_brs_7`	`0x0001C168`	`32`	`RO`	`0x00000000`	ios_sprt register brs_7
`bridge_ios_sprt_12_63_brs_8`	`0x0001C170`	`32`	`RO`	`0x00000000`	ios_sprt register brs_8
`bridge_ios_sprt_12_63_brs_9`	`0x0001C178`	`32`	`RO`	`0x00000000`	ios_sprt register brs_9
`bridge_ios_sprt_12_63_brus`	`0x0001C1B0`	`32`	`RO`	`0x00000000`	ios_sprt register brus
`bridge_ios_sprt_12_63_btrl_0`	`0x0001C080`	`32`	`RW`	`0x001400FF`	ios_sprt register btrl_0
`bridge_ios_sprt_12_63_btrl_1`	`0x0001C088`	`32`	`RW`	`0x001400FF`	ios_sprt register btrl_1
`bridge_ios_sprt_12_63_btrl_2`	`0x0001C090`	`32`	`RW`	`0x00000000`	ios_sprt register btrl_2
`bridge_ios_sprt_12_63_btrl_3`	`0x0001C098`	`32`	`RW`	`0x00000000`	ios_sprt register btrl_3
`bridge_ios_sprt_12_63_btus_0`	`0x0001C058`	`32`	`RO`	`0x00000000`	ios_sprt register btus_0
`bridge_ios_sprt_12_63_btus_1`	`0x0001C060`	`32`	`RO`	`0x00000000`	ios_sprt register btus_1
`bridge_ios_sprt_12_63_p_0`	`0x0001C000`	`32`	`RW`	`0x03030303`	ios_sprt register p_0
`bridge_ios_sprt_12_63_p_1`	`0x0001C008`	`32`	`RW`	`0x03030303`	ios_sprt register p_1
`bridge_ios_sprt_12_63_p_2`	`0x0001C010`	`32`	`RW`	`0x03030303`	ios_sprt register p_2
`bridge_ios_sprt_12_63_p_3`	`0x0001C018`	`32`	`RW`	`0x03030303`	ios_sprt register p_3
`bridge_ios_sprt_12_63_rxid`	`0x0001C1B8`	`32`	`RO`	`0x0000000C`	ios_sprt register rxid
`bridge_ios_sprt_12_63_txid`	`0x0001C078`	`32`	`RO`	`0x0000000C`	ios_sprt register txid
`bridge_mem0_sprt_13_118_as_bridge_id`	`0x00021D08`	`64`	`RO`	`0x000000000000000D`	mem0_sprt register as_bridge_id
`bridge_mem0_sprt_13_118_as_err`	`0x00021E00`	`64`	`RW`	`0x0000000000000000`	mem0_sprt register as_err
`bridge_mem0_sprt_13_118_as_intm`	`0x00021E40`	`64`	`RW`	`0x00000001000B0013`	mem0_sprt register as_intm
`bridge_mem0_sprt_13_118_as_sts`	`0x00021D00`	`64`	`RO`	`0x000000000000000C`	mem0_sprt register as_sts
`bridge_mem0_sprt_13_118_brs_0`	`0x00020130`	`32`	`RO`	`0x00000000`	mem0_sprt register brs_0
`bridge_mem0_sprt_13_118_brs_1`	`0x00020138`	`32`	`RO`	`0x00000000`	mem0_sprt register brs_1
`bridge_mem0_sprt_13_118_brs_10`	`0x00020180`	`32`	`RO`	`0x00000000`	mem0_sprt register brs_10
`bridge_mem0_sprt_13_118_brs_11`	`0x00020188`	`32`	`RO`	`0x00000000`	mem0_sprt register brs_11
`bridge_mem0_sprt_13_118_brs_12`	`0x00020190`	`32`	`RO`	`0x00000000`	mem0_sprt register brs_12
`bridge_mem0_sprt_13_118_brs_13`	`0x00020198`	`32`	`RO`	`0x00000000`	mem0_sprt register brs_13
`bridge_mem0_sprt_13_118_brs_14`	`0x000201A0`	`32`	`RO`	`0x00000000`	mem0_sprt register brs_14
`bridge_mem0_sprt_13_118_brs_15`	`0x000201A8`	`32`	`RO`	`0x00000000`	mem0_sprt register brs_15
`bridge_mem0_sprt_13_118_brs_2`	`0x00020140`	`32`	`RO`	`0x00000000`	mem0_sprt register brs_2
`bridge_mem0_sprt_13_118_brs_3`	`0x00020148`	`32`	`RO`	`0x00000000`	mem0_sprt register brs_3
`bridge_mem0_sprt_13_118_brs_4`	`0x00020150`	`32`	`RO`	`0x00000000`	mem0_sprt register brs_4
`bridge_mem0_sprt_13_118_brs_5`	`0x00020158`	`32`	`RO`	`0x00000000`	mem0_sprt register brs_5
`bridge_mem0_sprt_13_118_brs_6`	`0x00020160`	`32`	`RO`	`0x00000000`	mem0_sprt register brs_6
`bridge_mem0_sprt_13_118_brs_7`	`0x00020168`	`32`	`RO`	`0x00000000`	mem0_sprt register brs_7
`bridge_mem0_sprt_13_118_brs_8`	`0x00020170`	`32`	`RO`	`0x00000000`	mem0_sprt register brs_8
`bridge_mem0_sprt_13_118_brs_9`	`0x00020178`	`32`	`RO`	`0x00000000`	mem0_sprt register brs_9
`bridge_mem0_sprt_13_118_brus`	`0x000201B0`	`32`	`RO`	`0x00000000`	mem0_sprt register brus
`bridge_mem0_sprt_13_118_btrl_0`	`0x00020080`	`32`	`RW`	`0x001400FF`	mem0_sprt register btrl_0
`bridge_mem0_sprt_13_118_btrl_1`	`0x00020088`	`32`	`RW`	`0x001400FF`	mem0_sprt register btrl_1
`bridge_mem0_sprt_13_118_btrl_2`	`0x00020090`	`32`	`RW`	`0x00000000`	mem0_sprt register btrl_2
`bridge_mem0_sprt_13_118_btrl_3`	`0x00020098`	`32`	`RW`	`0x00000000`	mem0_sprt register btrl_3
`bridge_mem0_sprt_13_118_btus_0`	`0x00020058`	`32`	`RO`	`0x00000000`	mem0_sprt register btus_0
`bridge_mem0_sprt_13_118_btus_1`	`0x00020060`	`32`	`RO`	`0x00000000`	mem0_sprt register btus_1
`bridge_mem0_sprt_13_118_p_0`	`0x00020000`	`32`	`RW`	`0x03030303`	mem0_sprt register p_0
`bridge_mem0_sprt_13_118_p_1`	`0x00020008`	`32`	`RW`	`0x03030303`	mem0_sprt register p_1
`bridge_mem0_sprt_13_118_p_2`	`0x00020010`	`32`	`RW`	`0x03030303`	mem0_sprt register p_2
`bridge_mem0_sprt_13_118_p_3`	`0x00020018`	`32`	`RW`	`0x03030303`	mem0_sprt register p_3
`bridge_mem0_sprt_13_118_rxid`	`0x000201B8`	`32`	`RO`	`0x0000000D`	mem0_sprt register rxid
`bridge_mem0_sprt_13_118_txid`	`0x00020078`	`32`	`RO`	`0x0000000D`	mem0_sprt register txid
`bridge_ram_sprt_14_80_as_bridge_id`	`0x00025D08`	`64`	`RO`	`0x000000000000000E`	ram_sprt register as_bridge_id
`bridge_ram_sprt_14_80_as_err`	`0x00025E00`	`64`	`RW`	`0x0000000000000000`	ram_sprt register as_err
`bridge_ram_sprt_14_80_as_intm`	`0x00025E40`	`64`	`RW`	`0x00000001000B0013`	ram_sprt register as_intm
`bridge_ram_sprt_14_80_as_sts`	`0x00025D00`	`64`	`RO`	`0x000000000000000C`	ram_sprt register as_sts
`bridge_ram_sprt_14_80_brs_0`	`0x00024130`	`32`	`RO`	`0x00000000`	ram_sprt register brs_0
`bridge_ram_sprt_14_80_brs_1`	`0x00024138`	`32`	`RO`	`0x00000000`	ram_sprt register brs_1
`bridge_ram_sprt_14_80_brs_10`	`0x00024180`	`32`	`RO`	`0x00000000`	ram_sprt register brs_10
`bridge_ram_sprt_14_80_brs_11`	`0x00024188`	`32`	`RO`	`0x00000000`	ram_sprt register brs_11
`bridge_ram_sprt_14_80_brs_12`	`0x00024190`	`32`	`RO`	`0x00000000`	ram_sprt register brs_12
`bridge_ram_sprt_14_80_brs_13`	`0x00024198`	`32`	`RO`	`0x00000000`	ram_sprt register brs_13
`bridge_ram_sprt_14_80_brs_14`	`0x000241A0`	`32`	`RO`	`0x00000000`	ram_sprt register brs_14
`bridge_ram_sprt_14_80_brs_15`	`0x000241A8`	`32`	`RO`	`0x00000000`	ram_sprt register brs_15
`bridge_ram_sprt_14_80_brs_2`	`0x00024140`	`32`	`RO`	`0x00000000`	ram_sprt register brs_2
`bridge_ram_sprt_14_80_brs_3`	`0x00024148`	`32`	`RO`	`0x00000000`	ram_sprt register brs_3
`bridge_ram_sprt_14_80_brs_4`	`0x00024150`	`32`	`RO`	`0x00000000`	ram_sprt register brs_4
`bridge_ram_sprt_14_80_brs_5`	`0x00024158`	`32`	`RO`	`0x00000000`	ram_sprt register brs_5
`bridge_ram_sprt_14_80_brs_6`	`0x00024160`	`32`	`RO`	`0x00000000`	ram_sprt register brs_6
`bridge_ram_sprt_14_80_brs_7`	`0x00024168`	`32`	`RO`	`0x00000000`	ram_sprt register brs_7
`bridge_ram_sprt_14_80_brs_8`	`0x00024170`	`32`	`RO`	`0x00000000`	ram_sprt register brs_8
`bridge_ram_sprt_14_80_brs_9`	`0x00024178`	`32`	`RO`	`0x00000000`	ram_sprt register brs_9
`bridge_ram_sprt_14_80_brus`	`0x000241B0`	`32`	`RO`	`0x00000000`	ram_sprt register brus
`bridge_ram_sprt_14_80_btrl_0`	`0x00024080`	`32`	`RW`	`0x001400FF`	ram_sprt register btrl_0
`bridge_ram_sprt_14_80_btrl_1`	`0x00024088`	`32`	`RW`	`0x001400FF`	ram_sprt register btrl_1
`bridge_ram_sprt_14_80_btrl_2`	`0x00024090`	`32`	`RW`	`0x00000000`	ram_sprt register btrl_2
`bridge_ram_sprt_14_80_btrl_3`	`0x00024098`	`32`	`RW`	`0x00000000`	ram_sprt register btrl_3
`bridge_ram_sprt_14_80_btus_0`	`0x00024058`	`32`	`RO`	`0x00000000`	ram_sprt register btus_0
`bridge_ram_sprt_14_80_btus_1`	`0x00024060`	`32`	`RO`	`0x00000000`	ram_sprt register btus_1
`bridge_ram_sprt_14_80_p_0`	`0x00024000`	`32`	`RW`	`0x03030303`	ram_sprt register p_0
`bridge_ram_sprt_14_80_p_1`	`0x00024008`	`32`	`RW`	`0x03030303`	ram_sprt register p_1
`bridge_ram_sprt_14_80_p_2`	`0x00024010`	`32`	`RW`	`0x03030303`	ram_sprt register p_2
`bridge_ram_sprt_14_80_p_3`	`0x00024018`	`32`	`RW`	`0x03030303`	ram_sprt register p_3
`bridge_ram_sprt_14_80_rxid`	`0x000241B8`	`32`	`RO`	`0x0000000E`	ram_sprt register rxid
`bridge_ram_sprt_14_80_txid`	`0x00024078`	`32`	`RO`	`0x0000000E`	ram_sprt register txid
`bridge_rbm_s_15_66_as_bridge_id`	`0x00029D08`	`64`	`RO`	`0x000000000000000F`	rbm_s register as_bridge_id
`bridge_rbm_s_15_66_as_err`	`0x00029E00`	`64`	`RW`	`0x0000000000000000`	rbm_s register as_err
`bridge_rbm_s_15_66_as_intm`	`0x00029E40`	`64`	`RW`	`0x00000001000B0013`	rbm_s register as_intm
`bridge_rbm_s_15_66_as_sts`	`0x00029D00`	`64`	`RO`	`0x000000000000000C`	rbm_s register as_sts
`bridge_rbm_s_15_66_brs_0`	`0x00028130`	`32`	`RO`	`0x00000000`	rbm_s register brs_0
`bridge_rbm_s_15_66_brs_1`	`0x00028138`	`32`	`RO`	`0x00000000`	rbm_s register brs_1
`bridge_rbm_s_15_66_brs_10`	`0x00028180`	`32`	`RO`	`0x00000000`	rbm_s register brs_10
`bridge_rbm_s_15_66_brs_11`	`0x00028188`	`32`	`RO`	`0x00000000`	rbm_s register brs_11
`bridge_rbm_s_15_66_brs_12`	`0x00028190`	`32`	`RO`	`0x00000000`	rbm_s register brs_12
`bridge_rbm_s_15_66_brs_13`	`0x00028198`	`32`	`RO`	`0x00000000`	rbm_s register brs_13
`bridge_rbm_s_15_66_brs_14`	`0x000281A0`	`32`	`RO`	`0x00000000`	rbm_s register brs_14
`bridge_rbm_s_15_66_brs_15`	`0x000281A8`	`32`	`RO`	`0x00000000`	rbm_s register brs_15
`bridge_rbm_s_15_66_brs_2`	`0x00028140`	`32`	`RO`	`0x00000000`	rbm_s register brs_2
`bridge_rbm_s_15_66_brs_3`	`0x00028148`	`32`	`RO`	`0x00000000`	rbm_s register brs_3
`bridge_rbm_s_15_66_brs_4`	`0x00028150`	`32`	`RO`	`0x00000000`	rbm_s register brs_4
`bridge_rbm_s_15_66_brs_5`	`0x00028158`	`32`	`RO`	`0x00000000`	rbm_s register brs_5
`bridge_rbm_s_15_66_brs_6`	`0x00028160`	`32`	`RO`	`0x00000000`	rbm_s register brs_6
`bridge_rbm_s_15_66_brs_7`	`0x00028168`	`32`	`RO`	`0x00000000`	rbm_s register brs_7
`bridge_rbm_s_15_66_brs_8`	`0x00028170`	`32`	`RO`	`0x00000000`	rbm_s register brs_8
`bridge_rbm_s_15_66_brs_9`	`0x00028178`	`32`	`RO`	`0x00000000`	rbm_s register brs_9
`bridge_rbm_s_15_66_brus`	`0x000281B0`	`32`	`RO`	`0x00000000`	rbm_s register brus
`bridge_rbm_s_15_66_btrl_0`	`0x00028080`	`32`	`RW`	`0x001400FF`	rbm_s register btrl_0
`bridge_rbm_s_15_66_btrl_1`	`0x00028088`	`32`	`RW`	`0x001400FF`	rbm_s register btrl_1
`bridge_rbm_s_15_66_btrl_2`	`0x00028090`	`32`	`RW`	`0x00000000`	rbm_s register btrl_2
`bridge_rbm_s_15_66_btrl_3`	`0x00028098`	`32`	`RW`	`0x00000000`	rbm_s register btrl_3
`bridge_rbm_s_15_66_btus_0`	`0x00028058`	`32`	`RO`	`0x00000000`	rbm_s register btus_0
`bridge_rbm_s_15_66_btus_1`	`0x00028060`	`32`	`RO`	`0x00000000`	rbm_s register btus_1
`bridge_rbm_s_15_66_p_0`	`0x00028000`	`32`	`RW`	`0x03030303`	rbm_s register p_0
`bridge_rbm_s_15_66_p_1`	`0x00028008`	`32`	`RW`	`0x03030303`	rbm_s register p_1
`bridge_rbm_s_15_66_p_2`	`0x00028010`	`32`	`RW`	`0x03030303`	rbm_s register p_2
`bridge_rbm_s_15_66_p_3`	`0x00028018`	`32`	`RW`	`0x03030303`	rbm_s register p_3
`bridge_rbm_s_15_66_rxid`	`0x000281B8`	`32`	`RO`	`0x0000000F`	rbm_s register rxid
`bridge_rbm_s_15_66_txid`	`0x00028078`	`32`	`RO`	`0x0000000F`	rbm_s register txid
`bridge_tcu_mprt_3_70_SYSCOACK_reg`	`0x0002FF78`	`64`	`RO`	`0x0000000000000001`	tcu_mprt register SYSCOACK_reg
`bridge_tcu_mprt_3_70_SYSCOREQ_reg`	`0x0002FF70`	`64`	`RW`	`0x0000000000000001`	tcu_mprt register SYSCOREQ_reg
`bridge_tcu_mprt_3_70_am_adbase_mem_ios_sprt_iospace0a_0`	`0x0002C400`	`64`	`RW`	`0x0000000080000000`	tcu_mprt register am_adbase_mem_ios_sprt_iospace0a_0
`bridge_tcu_mprt_3_70_am_adbase_mem_ios_sprt_iospace0b_0`	`0x0002C420`	`64`	`RW`	`0x00000000C0000000`	tcu_mprt register am_adbase_mem_ios_sprt_iospace0b_0
`bridge_tcu_mprt_3_70_am_adbase_mem_ios_sprt_iospace1a_0`	`0x0002C440`	`64`	`RW`	`0x00000000F9000000`	tcu_mprt register am_adbase_mem_ios_sprt_iospace1a_0
`bridge_tcu_mprt_3_70_am_adbase_mem_ios_sprt_iospace1b_0`	`0x0002C460`	`64`	`RW`	`0x00000000FA000000`	tcu_mprt register am_adbase_mem_ios_sprt_iospace1b_0
`bridge_tcu_mprt_3_70_am_adbase_mem_ios_sprt_iospace1c_0`	`0x0002C480`	`64`	`RW`	`0x00000000FC000000`	tcu_mprt register am_adbase_mem_ios_sprt_iospace1c_0
`bridge_tcu_mprt_3_70_am_adbase_mem_ios_sprt_iospace1d_0`	`0x0002C4A0`	`64`	`RW`	`0x00000000FE000000`	tcu_mprt register am_adbase_mem_ios_sprt_iospace1d_0
`bridge_tcu_mprt_3_70_am_adbase_mem_ios_sprt_iospace1e_0`	`0x0002C4C0`	`64`	`RW`	`0x00000000FF000000`	tcu_mprt register am_adbase_mem_ios_sprt_iospace1e_0
`bridge_tcu_mprt_3_70_am_adbase_mem_ios_sprt_iospace1f_0`	`0x0002C4E0`	`64`	`RW`	`0x00000000FF800000`	tcu_mprt register am_adbase_mem_ios_sprt_iospace1f_0
`bridge_tcu_mprt_3_70_am_adbase_mem_ios_sprt_iospace1g_0`	`0x0002C500`	`64`	`RW`	`0x00000000FFC00000`	tcu_mprt register am_adbase_mem_ios_sprt_iospace1g_0
`bridge_tcu_mprt_3_70_am_adbase_mem_mem0_sprt_memspace0_0`	`0x0002C520`	`64`	`RW`	`0x0000000000000010`	tcu_mprt register am_adbase_mem_mem0_sprt_memspace0_0
`bridge_tcu_mprt_3_70_am_adbase_mem_mem0_sprt_memspace1a_0`	`0x0002C540`	`64`	`RW`	`0x0000000100000010`	tcu_mprt register am_adbase_mem_mem0_sprt_memspace1a_0
`bridge_tcu_mprt_3_70_am_adbase_mem_mem0_sprt_memspace1b_0`	`0x0002C560`	`64`	`RW`	`0x0000000200000010`	tcu_mprt register am_adbase_mem_mem0_sprt_memspace1b_0
`bridge_tcu_mprt_3_70_am_adbase_mem_mem0_sprt_memspace1c_0`	`0x0002C580`	`64`	`RW`	`0x0000000400000010`	tcu_mprt register am_adbase_mem_mem0_sprt_memspace1c_0
`bridge_tcu_mprt_3_70_am_adbase_mem_mem0_sprt_memspace1d_0`	`0x0002C5A0`	`64`	`RW`	`0x0000000800000010`	tcu_mprt register am_adbase_mem_mem0_sprt_memspace1d_0
`bridge_tcu_mprt_3_70_am_adbase_mem_mem0_sprt_memspace1e_0`	`0x0002C5C0`	`64`	`RW`	`0x0000001000000010`	tcu_mprt register am_adbase_mem_mem0_sprt_memspace1e_0
`bridge_tcu_mprt_3_70_am_adbase_mem_ram_sprt_ramspace0_0`	`0x0002C5E0`	`64`	`RW`	`0x00000000FFE00001`	tcu_mprt register am_adbase_mem_ram_sprt_ramspace0_0
`bridge_tcu_mprt_3_70_am_adbase_mem_ram_sprt_ramspace1_0`	`0x0002C600`	`64`	`RW`	`0x00000000FFE40010`	tcu_mprt register am_adbase_mem_ram_sprt_ramspace1_0
`bridge_tcu_mprt_3_70_am_adbase_mem_ram_sprt_ramspace2_0`	`0x0002C620`	`64`	`RW`	`0x00000000FFE80010`	tcu_mprt register am_adbase_mem_ram_sprt_ramspace2_0
`bridge_tcu_mprt_3_70_am_adbase_mem_ram_sprt_ramspace3_0`	`0x0002C640`	`64`	`RW`	`0x00000000FFEA0010`	tcu_mprt register am_adbase_mem_ram_sprt_ramspace3_0
`bridge_tcu_mprt_3_70_am_adbase_mem_ram_sprt_ramspace4_0`	`0x0002C660`	`64`	`RW`	`0x00000000FFEC0010`	tcu_mprt register am_adbase_mem_ram_sprt_ramspace4_0
`bridge_tcu_mprt_3_70_am_adbase_mem_ram_sprt_ramspace5_0`	`0x0002C680`	`64`	`RW`	`0x00000000FFEE0010`	tcu_mprt register am_adbase_mem_ram_sprt_ramspace5_0
`bridge_tcu_mprt_3_70_am_admask_mem_ios_sprt_iospace0a_0`	`0x0002C408`	`64`	`RW`	`0x00000FFFC0000000`	tcu_mprt register am_admask_mem_ios_sprt_iospace0a_0
`bridge_tcu_mprt_3_70_am_admask_mem_ios_sprt_iospace0b_0`	`0x0002C428`	`64`	`RW`	`0x00000FFFE0000000`	tcu_mprt register am_admask_mem_ios_sprt_iospace0b_0
`bridge_tcu_mprt_3_70_am_admask_mem_ios_sprt_iospace1a_0`	`0x0002C448`	`64`	`RW`	`0x00000FFFFF000000`	tcu_mprt register am_admask_mem_ios_sprt_iospace1a_0
`bridge_tcu_mprt_3_70_am_admask_mem_ios_sprt_iospace1b_0`	`0x0002C468`	`64`	`RW`	`0x00000FFFFE000000`	tcu_mprt register am_admask_mem_ios_sprt_iospace1b_0
`bridge_tcu_mprt_3_70_am_admask_mem_ios_sprt_iospace1c_0`	`0x0002C488`	`64`	`RW`	`0x00000FFFFE000000`	tcu_mprt register am_admask_mem_ios_sprt_iospace1c_0
`bridge_tcu_mprt_3_70_am_admask_mem_ios_sprt_iospace1d_0`	`0x0002C4A8`	`64`	`RW`	`0x00000FFFFF000000`	tcu_mprt register am_admask_mem_ios_sprt_iospace1d_0
`bridge_tcu_mprt_3_70_am_admask_mem_ios_sprt_iospace1e_0`	`0x0002C4C8`	`64`	`RW`	`0x00000FFFFF800000`	tcu_mprt register am_admask_mem_ios_sprt_iospace1e_0
`bridge_tcu_mprt_3_70_am_admask_mem_ios_sprt_iospace1f_0`	`0x0002C4E8`	`64`	`RW`	`0x00000FFFFFC00000`	tcu_mprt register am_admask_mem_ios_sprt_iospace1f_0
`bridge_tcu_mprt_3_70_am_admask_mem_ios_sprt_iospace1g_0`	`0x0002C508`	`64`	`RW`	`0x00000FFFFFE00000`	tcu_mprt register am_admask_mem_ios_sprt_iospace1g_0
`bridge_tcu_mprt_3_70_am_admask_mem_mem0_sprt_memspace0_0`	`0x0002C528`	`64`	`RW`	`0x00000FFF80000000`	tcu_mprt register am_admask_mem_mem0_sprt_memspace0_0
`bridge_tcu_mprt_3_70_am_admask_mem_mem0_sprt_memspace1a_0`	`0x0002C548`	`64`	`RW`	`0x00000FFF00000000`	tcu_mprt register am_admask_mem_mem0_sprt_memspace1a_0
`bridge_tcu_mprt_3_70_am_admask_mem_mem0_sprt_memspace1b_0`	`0x0002C568`	`64`	`RW`	`0x00000FFE00000000`	tcu_mprt register am_admask_mem_mem0_sprt_memspace1b_0
`bridge_tcu_mprt_3_70_am_admask_mem_mem0_sprt_memspace1c_0`	`0x0002C588`	`64`	`RW`	`0x00000FFC00000000`	tcu_mprt register am_admask_mem_mem0_sprt_memspace1c_0
`bridge_tcu_mprt_3_70_am_admask_mem_mem0_sprt_memspace1d_0`	`0x0002C5A8`	`64`	`RW`	`0x00000FF800000000`	tcu_mprt register am_admask_mem_mem0_sprt_memspace1d_0
`bridge_tcu_mprt_3_70_am_admask_mem_mem0_sprt_memspace1e_0`	`0x0002C5C8`	`64`	`RW`	`0x00000FF000000000`	tcu_mprt register am_admask_mem_mem0_sprt_memspace1e_0
`bridge_tcu_mprt_3_70_am_admask_mem_ram_sprt_ramspace0_0`	`0x0002C5E8`	`64`	`RW`	`0x00000FFFFFFC0003`	tcu_mprt register am_admask_mem_ram_sprt_ramspace0_0
`bridge_tcu_mprt_3_70_am_admask_mem_ram_sprt_ramspace1_0`	`0x0002C608`	`64`	`RW`	`0x00000FFFFFFC0000`	tcu_mprt register am_admask_mem_ram_sprt_ramspace1_0
`bridge_tcu_mprt_3_70_am_admask_mem_ram_sprt_ramspace2_0`	`0x0002C628`	`64`	`RW`	`0x00000FFFFFFE0000`	tcu_mprt register am_admask_mem_ram_sprt_ramspace2_0
`bridge_tcu_mprt_3_70_am_admask_mem_ram_sprt_ramspace3_0`	`0x0002C648`	`64`	`RW`	`0x00000FFFFFFE0000`	tcu_mprt register am_admask_mem_ram_sprt_ramspace3_0
`bridge_tcu_mprt_3_70_am_admask_mem_ram_sprt_ramspace4_0`	`0x0002C668`	`64`	`RW`	`0x00000FFFFFFE0000`	tcu_mprt register am_admask_mem_ram_sprt_ramspace4_0
`bridge_tcu_mprt_3_70_am_admask_mem_ram_sprt_ramspace5_0`	`0x0002C688`	`64`	`RW`	`0x00000FFFFFFE0000`	tcu_mprt register am_admask_mem_ram_sprt_ramspace5_0
`bridge_tcu_mprt_3_70_am_bridge_id`	`0x0002FD08`	`64`	`RO`	`0x0000000000000003`	tcu_mprt register am_bridge_id
`bridge_tcu_mprt_3_70_am_err`	`0x0002FE00`	`64`	`RW`	`0x0000000000000000`	tcu_mprt register am_err
`bridge_tcu_mprt_3_70_am_intm`	`0x0002FE40`	`64`	`RW`	`0x00000007004F004F`	tcu_mprt register am_intm
`bridge_tcu_mprt_3_70_am_sts`	`0x0002FD00`	`64`	`RO`	`0x000000000000000C`	tcu_mprt register am_sts
`bridge_tcu_mprt_3_70_brs_0`	`0x0002C130`	`32`	`RO`	`0x00000000`	tcu_mprt register brs_0
`bridge_tcu_mprt_3_70_brs_1`	`0x0002C138`	`32`	`RO`	`0x00000000`	tcu_mprt register brs_1
`bridge_tcu_mprt_3_70_brs_10`	`0x0002C180`	`32`	`RO`	`0x00000000`	tcu_mprt register brs_10
`bridge_tcu_mprt_3_70_brs_11`	`0x0002C188`	`32`	`RO`	`0x00000000`	tcu_mprt register brs_11
`bridge_tcu_mprt_3_70_brs_12`	`0x0002C190`	`32`	`RO`	`0x00000000`	tcu_mprt register brs_12
`bridge_tcu_mprt_3_70_brs_13`	`0x0002C198`	`32`	`RO`	`0x00000000`	tcu_mprt register brs_13
`bridge_tcu_mprt_3_70_brs_14`	`0x0002C1A0`	`32`	`RO`	`0x00000000`	tcu_mprt register brs_14
`bridge_tcu_mprt_3_70_brs_15`	`0x0002C1A8`	`32`	`RO`	`0x00000000`	tcu_mprt register brs_15
`bridge_tcu_mprt_3_70_brs_2`	`0x0002C140`	`32`	`RO`	`0x00000000`	tcu_mprt register brs_2
`bridge_tcu_mprt_3_70_brs_3`	`0x0002C148`	`32`	`RO`	`0x00000000`	tcu_mprt register brs_3
`bridge_tcu_mprt_3_70_brs_4`	`0x0002C150`	`32`	`RO`	`0x00000000`	tcu_mprt register brs_4
`bridge_tcu_mprt_3_70_brs_5`	`0x0002C158`	`32`	`RO`	`0x00000000`	tcu_mprt register brs_5
`bridge_tcu_mprt_3_70_brs_6`	`0x0002C160`	`32`	`RO`	`0x00000000`	tcu_mprt register brs_6
`bridge_tcu_mprt_3_70_brs_7`	`0x0002C168`	`32`	`RO`	`0x00000000`	tcu_mprt register brs_7
`bridge_tcu_mprt_3_70_brs_8`	`0x0002C170`	`32`	`RO`	`0x00000000`	tcu_mprt register brs_8
`bridge_tcu_mprt_3_70_brs_9`	`0x0002C178`	`32`	`RO`	`0x00000000`	tcu_mprt register brs_9
`bridge_tcu_mprt_3_70_brus`	`0x0002C1B0`	`32`	`RO`	`0x00000000`	tcu_mprt register brus
`bridge_tcu_mprt_3_70_btrl_0`	`0x0002C080`	`32`	`RW`	`0x001400FF`	tcu_mprt register btrl_0
`bridge_tcu_mprt_3_70_btrl_1`	`0x0002C088`	`32`	`RW`	`0x001400FF`	tcu_mprt register btrl_1
`bridge_tcu_mprt_3_70_btrl_2`	`0x0002C090`	`32`	`RW`	`0x001400FF`	tcu_mprt register btrl_2
`bridge_tcu_mprt_3_70_btrl_3`	`0x0002C098`	`32`	`RW`	`0x001400FF`	tcu_mprt register btrl_3
`bridge_tcu_mprt_3_70_btus_0`	`0x0002C058`	`32`	`RO`	`0x00000000`	tcu_mprt register btus_0
`bridge_tcu_mprt_3_70_btus_1`	`0x0002C060`	`32`	`RO`	`0x00000000`	tcu_mprt register btus_1
`bridge_tcu_mprt_3_70_p_0`	`0x0002C000`	`32`	`RW`	`0x03030303`	tcu_mprt register p_0
`bridge_tcu_mprt_3_70_p_1`	`0x0002C008`	`32`	`RW`	`0x03030303`	tcu_mprt register p_1
`bridge_tcu_mprt_3_70_p_2`	`0x0002C010`	`32`	`RW`	`0x03030303`	tcu_mprt register p_2
`bridge_tcu_mprt_3_70_p_3`	`0x0002C018`	`32`	`RW`	`0x03030303`	tcu_mprt register p_3
`bridge_tcu_mprt_3_70_rxid`	`0x0002C1B8`	`32`	`RO`	`0x00000003`	tcu_mprt register rxid
`bridge_tcu_mprt_3_70_txid`	`0x0002C078`	`32`	`RO`	`0x00000003`	tcu_mprt register txid
`bridge_rbm_m_16_66_am_bridge_id`	`0x00003D08`	`64`	`RO`	`0x0000000000000010`	rbm_m register am_bridge_id
`bridge_rbm_m_16_66_am_err`	`0x00003E00`	`64`	`RW`	`0x0000000000000000`	rbm_m register am_err
`bridge_rbm_m_16_66_am_intm`	`0x00003E40`	`64`	`RW`	`0x00000007004F004F`	rbm_m register am_intm
`bridge_rbm_m_16_66_am_nocver_id`	`0x00003D10`	`64`	`RO`	`0x0000000000000000`	rbm_m register am_nocver_id
`bridge_rbm_m_16_66_am_sts`	`0x00003D00`	`64`	`RO`	`0x000000000000000C`	rbm_m register am_sts
`bridge_rbm_m_16_66_brs_0`	`0x00000130`	`32`	`RO`	`0x00000000`	rbm_m register brs_0
`bridge_rbm_m_16_66_brs_1`	`0x00000138`	`32`	`RO`	`0x00000000`	rbm_m register brs_1
`bridge_rbm_m_16_66_brs_10`	`0x00000180`	`32`	`RO`	`0x00000000`	rbm_m register brs_10
`bridge_rbm_m_16_66_brs_11`	`0x00000188`	`32`	`RO`	`0x00000000`	rbm_m register brs_11
`bridge_rbm_m_16_66_brs_12`	`0x00000190`	`32`	`RO`	`0x00000000`	rbm_m register brs_12
`bridge_rbm_m_16_66_brs_13`	`0x00000198`	`32`	`RO`	`0x00000000`	rbm_m register brs_13
`bridge_rbm_m_16_66_brs_14`	`0x000001A0`	`32`	`RO`	`0x00000000`	rbm_m register brs_14
`bridge_rbm_m_16_66_brs_15`	`0x000001A8`	`32`	`RO`	`0x00000000`	rbm_m register brs_15
`bridge_rbm_m_16_66_brs_2`	`0x00000140`	`32`	`RO`	`0x00000000`	rbm_m register brs_2
`bridge_rbm_m_16_66_brs_3`	`0x00000148`	`32`	`RO`	`0x00000000`	rbm_m register brs_3
`bridge_rbm_m_16_66_brs_4`	`0x00000150`	`32`	`RO`	`0x00000000`	rbm_m register brs_4
`bridge_rbm_m_16_66_brs_5`	`0x00000158`	`32`	`RO`	`0x00000000`	rbm_m register brs_5
`bridge_rbm_m_16_66_brs_6`	`0x00000160`	`32`	`RO`	`0x00000000`	rbm_m register brs_6
`bridge_rbm_m_16_66_brs_7`	`0x00000168`	`32`	`RO`	`0x00000000`	rbm_m register brs_7
`bridge_rbm_m_16_66_brs_8`	`0x00000170`	`32`	`RO`	`0x00000000`	rbm_m register brs_8
`bridge_rbm_m_16_66_brs_9`	`0x00000178`	`32`	`RO`	`0x00000000`	rbm_m register brs_9
`bridge_rbm_m_16_66_brus`	`0x000001B0`	`32`	`RO`	`0x00000000`	rbm_m register brus
`bridge_rbm_m_16_66_btrl_0`	`0x00000080`	`32`	`RW`	`0x00000000`	rbm_m register btrl_0
`bridge_rbm_m_16_66_btrl_1`	`0x00000088`	`32`	`RW`	`0x00000000`	rbm_m register btrl_1
`bridge_rbm_m_16_66_btrl_2`	`0x00000090`	`32`	`RW`	`0x00000000`	rbm_m register btrl_2
`bridge_rbm_m_16_66_btrl_3`	`0x00000098`	`32`	`RW`	`0x00000000`	rbm_m register btrl_3
`bridge_rbm_m_16_66_btus_0`	`0x00000058`	`32`	`RO`	`0x00000000`	rbm_m register btus_0
`bridge_rbm_m_16_66_btus_1`	`0x00000060`	`32`	`RO`	`0x00000000`	rbm_m register btus_1
`bridge_rbm_m_16_66_rxid`	`0x000001B8`	`32`	`RO`	`0x00000010`	rbm_m register rxid
`bridge_rbm_m_16_66_txid`	`0x00000078`	`32`	`RO`	`0x00000010`	rbm_m register txid
`agent_ccc0_ccc_active_vector_0`	`0x00030020`	`64`	`RO`	`0x0000000000000007`	agent_ccc0 register ccc_active_vector_0
`agent_ccc0_ccc_agent_disable_status`	`0x00030038`	`64`	`RO`	`0x0000000000000001`	agent_ccc0 register ccc_agent_disable_status
`agent_ccc0_ccc_crt_status_0`	`0x00030140`	`64`	`RO`	`0x0000000000000000`	agent_ccc0 register ccc_crt_status_0
`agent_ccc0_ccc_crt_status_1`	`0x00030148`	`64`	`RO`	`0x0000000000000000`	agent_ccc0 register ccc_crt_status_1
`agent_ccc0_ccc_crt_status_2`	`0x00030150`	`64`	`RO`	`0x0000000000000000`	agent_ccc0 register ccc_crt_status_2
`agent_ccc0_ccc_crt_status_3`	`0x00030158`	`64`	`RO`	`0x0000000000000000`	agent_ccc0 register ccc_crt_status_3
`agent_ccc0_ccc_crt_status_4`	`0x00030160`	`64`	`RO`	`0x0000000000000000`	agent_ccc0 register ccc_crt_status_4
`agent_ccc0_ccc_crt_status_5`	`0x00030168`	`64`	`RO`	`0x0000000000000000`	agent_ccc0 register ccc_crt_status_5
`agent_ccc0_ccc_crt_status_6`	`0x00030170`	`64`	`RO`	`0x0000000000000000`	agent_ccc0 register ccc_crt_status_6
`agent_ccc0_ccc_crt_status_7`	`0x00030178`	`64`	`RO`	`0x0000000000000000`	agent_ccc0 register ccc_crt_status_7
`agent_ccc0_ccc_directory_inv`	`0x00030080`	`64`	`RW`	`0x0000000000000000`	agent_ccc0 register ccc_directory_inv
`agent_ccc0_ccc_ecc_disable`	`0x00030028`	`64`	`RW`	`0x0000000000000000`	agent_ccc0 register ccc_ecc_disable
`agent_ccc0_ccc_ecc_info`	`0x00030180`	`64`	`RW`	`0x0000000000000000`	agent_ccc0 register ccc_ecc_info
`agent_ccc0_ccc_event_counter_mask`	`0x00030100`	`64`	`RW`	`0x0000000000000000`	agent_ccc0 register ccc_event_counter_mask
`agent_ccc0_ccc_event_counter_value`	`0x00030108`	`64`	`RW`	`0x0000000000000000`	agent_ccc0 register ccc_event_counter_value
`agent_ccc0_ccc_hash_bypass`	`0x00030030`	`64`	`RW`	`0x0000000000000000`	agent_ccc0 register ccc_hash_bypass
`agent_ccc0_ccc_indirect_access_trig`	`0x00030088`	`64`	`RW`	`0x0000000000000000`	agent_ccc0 register ccc_indirect_access_trig
`agent_ccc0_ccc_indirect_ram_cont_0`	`0x00030090`	`64`	`RW`	`0x0000000000000000`	agent_ccc0 register ccc_indirect_ram_cont_0
`agent_ccc0_ccc_indirect_ram_cont_1`	`0x00030098`	`64`	`RW`	`0x0000000000000000`	agent_ccc0 register ccc_indirect_ram_cont_1
`agent_ccc0_ccc_indirect_ram_cont_2`	`0x000300A0`	`64`	`RW`	`0x0000000000000000`	agent_ccc0 register ccc_indirect_ram_cont_2
`agent_ccc0_ccc_indirect_ram_cont_3`	`0x000300A8`	`64`	`RW`	`0x0000000000000000`	agent_ccc0 register ccc_indirect_ram_cont_3
`agent_ccc0_ccc_indirect_ram_cont_4`	`0x000300B0`	`64`	`RW`	`0x0000000000000000`	agent_ccc0 register ccc_indirect_ram_cont_4
`agent_ccc0_ccc_indirect_ram_cont_5`	`0x000300B8`	`64`	`RW`	`0x0000000000000000`	agent_ccc0 register ccc_indirect_ram_cont_5
`agent_ccc0_ccc_indirect_ram_cont_6`	`0x000300C0`	`64`	`RW`	`0x0000000000000000`	agent_ccc0 register ccc_indirect_ram_cont_6
`agent_ccc0_ccc_indirect_ram_cont_7`	`0x000300C8`	`64`	`RW`	`0x0000000000000000`	agent_ccc0 register ccc_indirect_ram_cont_7
`agent_ccc0_ccc_interrupt_err`	`0x00030198`	`64`	`RW`	`0x0000000000000000`	agent_ccc0 register ccc_interrupt_err
`agent_ccc0_ccc_interrupt_mask`	`0x00030190`	`64`	`RW`	`0x0000000000000006`	agent_ccc0 register ccc_interrupt_mask
`agent_ccc0_ccc_llc_control`	`0x00030040`	`64`	`RW`	`0x0000000000000000`	agent_ccc0 register ccc_llc_control
`agent_ccc0_ccc_spec_fetch_0`	`0x00030000`	`64`	`RW`	`0x0000000000000003`	agent_ccc0 register ccc_spec_fetch_0
`agent_ccc0_ccc_spec_fetch_1`	`0x00030008`	`64`	`RW`	`0x0000000000000000`	agent_ccc0 register ccc_spec_fetch_1
`agent_ccc0_ccc_spec_fetch_2`	`0x00030010`	`64`	`RW`	`0x0000000000000000`	agent_ccc0 register ccc_spec_fetch_2
`agent_ccc0_ccc_spec_fetch_3`	`0x00030018`	`64`	`RW`	`0x0000000000000000`	agent_ccc0 register ccc_spec_fetch_3
`agent_dvm0_dvm_active_vector_0`	`0x00034000`	`64`	`RO`	`0x000000000000000B`	agent_dvm0 register dvm_active_vector_0
`agent_dvm0_dvm_agent_disable_status`	`0x00034048`	`64`	`RO`	`0x0000000000000001`	agent_dvm0 register dvm_agent_disable_status
`agent_dvm0_dvm_fault_log_0`	`0x00034020`	`64`	`RW`	`0x0000000000000000`	agent_dvm0 register dvm_fault_log_0
`agent_dvm0_dvm_sts`	`0x00034040`	`64`	`RO`	`0x0000000000000000`	agent_dvm0 register dvm_sts