agent_ccc0_ccc_ecc_info 

         This register monitors ECC errors and saves information for potential debug support. The register holds two kinds of information. It keeps a count of all ECC errors that have been detected in a 16 bit ECC counter.
It also tracks at least one RAM location where an ECC event has occurred. The first ECC even to occur will update the SB or DB bits and the index. The SB stands for single-bit, and connotes a correctable error. DB is double-bit, and applies to all uncorrectable error cases, which include double-bit corruption or more. The register also tracks which of the two RAMs the error was detected in.
While the first error of either kind will be added to the register, and the first uncorrectable error will overwrite any status that was caused by an earlier single-bit event. This is because the uncorrectable error is typically fatal and the status is more important.
Module Instance Base Address Register Address
i_ccu_noc_registers 0xF7000000 0xF7030180

Size: 64

Offset: 0x30180

Access: RW

Access mode: SECURE | PRIVILEGEMODE

Note: The processor must make a secure, privileged bus access to this register. You can configure processor mode settings in the control registers of the ARM Cortex-A53 MPcore processor. For more information about processor modes, please refer to the ARM Infocenter.

Important: The value of a reserved bit must be maintained in software. When you modify registers containing reserved bit fields, you must use a read-modify-write operation to preserve state and prevent indeterminate system behavior.
Bit Fields
63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48

UNSD_63_44

RO 0x0

47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32

UNSD_63_44

RO 0x0

DIR_INDEX

RW 0x0

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

ECC_COUNT

RW 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

UNSD_15_3

RO 0x0

WAY

RW 0x0

DB

RW 0x0

SB

RW 0x0

agent_ccc0_ccc_ecc_info Fields

Bit Name Description Access Reset
63:44 UNSD_63_44
RO 0x0
43:32 DIR_INDEX 
                 -: Index of first detected error
RW 0x0
31:16 ECC_COUNT 
                 -: Number of ECC errors found
RW 0x0
15:3 UNSD_15_3
RO 0x0
2 WAY 
                 1'b1: Directory bank of first detected error
RW 0x0
1 DB 
                 1'b1: Detected double of multi-bit error
RW 0x0
0 SB 
                 1'b1: Detected single-bit error
RW 0x0