bridge_ddrreg_sprt_8_118_as_err

         These error status bits record the first error event and have to be cleared by writing a 1'b0 before new errors are recorded. e0 - e7 are relative to AR channel. e16 - e23 are WR channel counter parts.
      
Module Instance Base Address Register Address
i_ccu_noc_registers 0xF7000000 0xF7009E00

Size: 64

Offset: 0x9E00

Access: RW

Access mode: SECURE | PRIVILEGEMODE

Note: The processor must make a secure, privileged bus access to this register. You can configure processor mode settings in the control registers of the ARM Cortex-A53 MPcore processor. For more information about processor modes, please refer to the ARM Infocenter.

Important: The value of a reserved bit must be maintained in software. When you modify registers containing reserved bit fields, you must use a read-modify-write operation to preserve state and prevent indeterminate system behavior.
Bit Fields
63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48

UNSD_63_33

RO 0x0

47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32

UNSD_63_33

RO 0x0

E32

RW 0x0

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

UNSD_31_20

RO 0x0

E19

RW 0x0

E18

RW 0x0

E17

RW 0x0

E16

RW 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

UNSD_15_5

RO 0x0

E4

RW 0x0

E3

RW 0x0

E2

RW 0x0

E1

RW 0x0

E0

RW 0x0

bridge_ddrreg_sprt_8_118_as_err Fields

Bit Name Description Access Reset
63:33 UNSD_63_33
                 
                 
RO 0x0
32 E32
                 1'b1: Traffic sent to a noc layer which is power gated

                 
RW 0x0
31:20 UNSD_31_20
                 
                 
RO 0x0
19 E19
                 1'b1: Write command modified: A write command which was marked as non-modifiable was modified by the slave bridge

                 
RW 0x0
18 E18
                 1'b1: Unknown write response destination: BID from write response produces a destination which is not present in the routing table

                 
RW 0x0
17 E17
                 1'b1: Write slave error response: Slave error response received from slave device for write command

                 
RW 0x0
16 E16
                 1'b1: Write decode error response: Decode error response received from slave device for write command

                 
RW 0x0
15:5 UNSD_15_5
                 
                 
RO 0x0
4 E4
                 1'b1: Read command modified: A read command which was marked as non-modifiable was modified by the slave bridge

                 
RW 0x0
3 E3
                 1'b1: Interleaved read response: Interleaved read response. This can occur if interleaved read response is received from a slave device for which a de-interleaver was not specified

                 
RW 0x0
2 E2
                 1'b1: Unknown read response destination: RID from read response produces a destination which is not present in the routing table

                 
RW 0x0
1 E1
                 1'b1: Read slave error response: Slave error response received from slave device for read command

                 
RW 0x0
0 E0
                 1'b1: Read decode error response: Decode error response received from slave device for read command

                 
RW 0x0