PHY Lite for Parallel Interfaces Intel® FPGA IP User Guide

ID 683716
Date 7/15/2024
Public
Document Table of Contents

2.1. Release Information

The Intel® FPGA IP versioning scheme is X.Y.Z and this version number can change with each Quartus® Prime software version. A change in:

  • X indicates a major revision of the IP. If you update the Quartus® Prime software, you must regenerate the IP.
  • Y indicates the IP includes new features. Regenerate your IP to include these new features.
  • Z indicates the IP includes minor changes. Regenerate your IP to include these changes.

The following table provides the release information of PHY Lite for Parallel Interfaces Intel® FPGA IP for Agilex™ 5 E-Series.

Table 1.   PHY Lite for Parallel Interfaces Intel® FPGA IP for Agilex™ 5 E-Series Release Information
Item Description
IP Version 5.0.0
Quartus® Prime Pro Version 24.1
Release Date 2024.04.01