PHY Lite for Parallel Interfaces Intel® FPGA IP User Guide

ID 683716
Date 7/15/2024
Public
Document Table of Contents

6.2.5.4. Calibration Guidelines

The PHY Lite for Parallel Interfaces Intel® FPGA IP allows you to dynamically reconfigure the features of the interface. However, performing calibration is an application specific process. This section provides some general guidelines for calibrating the Arria® 10 and Cyclone® 10 GX I/O architecture.