PHY Lite for Parallel Interfaces Intel® FPGA IP User Guide

ID 683716
Date 7/15/2024
Public
Document Table of Contents

2.4.1.3.2. Single-Ended Pin Configurations

Single-ended DQ output data pins can be configured into a maximum of 8 groups using x8 DQS trees, with a maximum of 10 single-ended DQ data pins per group except for the RZQ lane. The RZQ lane can have a maximum of 9 single-ended DQ data pins. If the ref_clk pin is reserved in the same RZQ lane, then the maximum number of DQ data pins in this lane will be 8 or 7, depending on 1 or 2 pins for single-ended or differential ref_clk. For instance, using a single-ended ref_clk and differential strobe pins, the maximum number of single-ended DQ output data pins in this 8-group configuration can be determined as follows:

LANES 0, 1, 2, 4, 5, 6, and 7 : 7 groups/lanes x 10 DQ pins = 70 DQ pins

LANE 3 : 1 group/lane x 8 DQ pins = 8 DQ pins

TOTAL : 78 DQ pins

Figure 20. Single-ended DQ Output Data Pin Configuration for 8 Groups

Single-ended DQ output data pins can also be configured into a maximum of 22 pins per group, with a maximum of 4 groups using x16 DQS trees. Using the same scenario of a single-ended ref_clk reserved on pin 36 (Lane 3) and using differential strobe pins, the maximum number of single-ended DQ output data pins in this 4-group configuration can be determined as follows:

LANES 0-1, 4-5, and 6-7 : 3 groups x 22 DQ pins = 66 DQ pins

LANES 2-3 : 1 group x 20 DQ pins = 20 DQ pins

TOTAL : 86 DQ pins

Figure 21. Single-ended DQ Output Data Pin Configuration for 4 Groups

Single-ended DQ input or bidirectional data pins cannot share the same lane as the RZQ pin. Thus, input or bidirectional data pins can be configured into a maximum of 7 groups using x8 DQS trees, with a maximum of 10 pins per group. Using the same scenario of a single-ended ref_clk reserved on pin 36 (Lane 3) and using differential strobe pins, the maximum number of single-ended DQ input or bidirectional data pins in this 7-group configuration can be determined as follows:

LANES 0, 1, 2, 4, 5, 6, and 7 : 7 groups/lanes x 10 DQ pins = 70 DQ pins

LANE 3 : 1 group/lane x 0 DQ pins = 0 DQ pins

TOTAL : 70 DQ pins

Figure 22. Single-ended DQ Input or Bidirectional Data Pin Configuration for 7 Groups

Single-ended input or bidirectional data pins can also be configured into a maximum of 4 groups using x16 DQS trees, with a maximum of 22 pins per group except for the group containing the RZQ lane, which cannot be shared with any input or bidirectional data pin. Using the same scenario of a single-ended ref_clk reserved on pin 36 or 37 (Lane 3) and using differential strobe pins, the maximum number of single-ended DQ input or bidirectional data pins in this 4-group configuration can be determined as follows:

LANES 0-1 and 6-7 : 2 groups x 22 DQ pins = 44 DQ pins

LANES 2 : 1 group x 10 DQ pins = 10 DQ pins

LANE 3 : 0 group x 0 DQ pin = 0 DQ pin

LANES 4-5 : 1 group x 22 DQ pins = 22 DQ pins

Total : 76 DQ pins

Figure 23. Single-ended DQ Input or Bidirectional Data Pin Configuration for 4 Groups