PHY Lite for Parallel Interfaces Intel® FPGA IP User Guide

ID 683716
Date 7/15/2024
Public
Document Table of Contents

4.2.2. Agilex™ 7 F-Series and I-Series Input DQS/Strobe Tree

The input DQS/strobe tree is a balanced clock network that distributes the read capture strobe (such as DQS/DQS#) from the external device to the read capture registers inside the I/Os.

The DQS/strobe tree is used for input and bidirectional pin types.

Within every bank, only certain physical pins at specific locations can drive the input DQS/strobe trees. The pin locations that can drive the input DQS/strobe trees vary, depending on the size of the group.

Table 58.  Pins Usable as Read Capture Clock / Strobe Pair
Sub-bank Lane used by Data Pins Group Size Strobe Pins 5 6
0 x8 / x9 Pin 4, 5
1 x8 / x9 Pin 16, 17
2 x8 / x9 Pin 28, 29
3 x8 / x9 Pin 40, 41
0, 1 x18 Pin 4, 5
2, 3 x18 Pin 28, 29
1, 2 x36 Pin 16, 17
0, 1, 2 x36 Pin 16, 17
1, 2, 3 x36 Pin 16, 17
0, 1, 2, 3 x36 Pin 16, 17

To target the lower/upper half of GPIO, use the Physical Sub-Bank ID as shown in the diagrams in the Agilex™ 7 for F-Series and I-Series I/O Sub-bank Interconnects section. For example, if the placement for x18 of sub-bank 0, 1 targets at the top sub-bank of bank 2D in Agilex™ 7 AGF012 and AGF014 devices, package R24B, enter Physical Sub-Bank ID = 6 at the Pin Placement tab in the PHY Lite IP parameter editor in the Quartus® Prime Pro Edition software.

The PHY Lite for Parallel Interfaces Intel® FPGA IP for Agilex™ 7 F-Series and I-Series devices does not permit QSF-based pin assignment. Instead, the pin placement automatically occurs based on the information from Data/Strobe Pin Placement Within Sub-Bank at the Pin Placement tab in the PHY Lite IP parameter editor in the Intel Quartus Prime software.

Figure 92. Pin Placement Example

In quarter rate mode, the unused strobe pins are always reserved. For example, if you use lanes 0, 1, 2, and 3, then pins 16 and 17 (pin index 4 and 5 in lane 1) are used for strobe signals. If you use lanes 2 and 3, then pins 28 and 29 (pin index 4 and 5 in lane 2) are used for strobe signals. You cannot use the unused strobe pins.

Figure 93. Pin Placement Example in Quarter Rate Mode

In half rate mode, you can assign the unused strobe pins as data pins. For example, if you use lanes 0, 1, 2, and 3, only pins 16 and 17 (pin index 4 and 5 in lane 1) are used for strobe signals. If you use lanes 2 and 3, only pins 28 and 29 (pin index 4 and 5 in lane 2) are used for strobe signals.

Figure 94. Pin Placement Example in Half Rate Mode
5 For strobe pin, use either pin for single-ended and use both pins for differential.
6 In quarter rate, unused strobe pin cannot be used as data pins.