PHY Lite for Parallel Interfaces Intel® FPGA IP User Guide

ID 683716
Date 7/15/2024
Public
Document Table of Contents

6.2.2.1. Clock Frequency Relationships

The following equations describe the relationships between the clock domains available in the PHY Lite for Parallel Interfaces Intel® FPGA IP core.

Core Clock Rate = Interface clock frequency / Core clock frequency

VCO frequency Multiplier Factor = VCO clock frequency 14 / Interface clock frequency

14 You can obtain this value from the VCO clock frequency parameter under General Tab in the IP parameter editor.