PHY Lite for Parallel Interfaces Intel® FPGA IP User Guide

ID 683716
Date 7/15/2024
Public
Document Table of Contents

6.3.2.2. Output Path Signals

Table 135.  Output Path SignalsOutput path signals are signals that are available when you set the Pin Type parameter to either Output or Bidirectional.
Signal Name Direction Width Description
oe_from_core Input

Quarter-rate: 4 x PIN_WIDTH

Half-rate: 2 x PIN_WIDTH

Full-rate: 1 x PIN_WIDTH

Output enable signal from core logic. Synchronous to the core_clk output from the IP.
data_from_core Input

Quarter rate-DDR: 8 x PIN_WIDTH

Half-rate DDR: 4 x PIN_WIDTH

Full-rate DDR: 2 x PIN_WIDTH

Quarter-rate SDR: 4 x PIN_WIDTH

Half-rate SDR: 2 x PIN_WIDTH

Full-rate SDR: 1 x PIN_WIDTH

Data signal from core logic. Synchronous to the core_clk output from the IP.
strobe_out_in Input

Quarter-rate: 8

Half-rate: 4

Full-rate: 2

Strobe signal from core logic. Synchronous to the core_clk output from the IP.
Note: This path is always DDR.
strobe_out_en Input

Quarter-rate: 4

Half-rate: 2

Full-rate: 1

Strobe output enable from core logic. Synchronous to the core_clk output from the IP.
data_out/data_io Output/Bidirectional
  • 1 to 48 if data configuration is Single Ended
  • 1 to 24 if data configuration is Differential
Data output from PHY Lite for Parallel Interfaces Intel® FPGA IP. Synchronous to the strobe_out or strobe_io output from the IP.

If the Pin Type parameter is set to Output, the data_out signals are used. If the Pin Type parameter is set to Bidirectional, the data_io signals are used.

data_out_n/data_io_n Output/Bidirectional 1 to 24 Negative data output from PHY Lite for Parallel Interfaces Intel® FPGA IP is enabled when data configuration is set to Differential. Data is synchronous to the strobe_out or strobe_io output from the IP. If the Pin Type is set to Output, the data_out_n ports are used. If the pin type is set to Bidirectional, the data_io_n ports are used.
strobe_out/strobe_io Output/Bidirectional 1 Positive output strobe from PHY Lite for Parallel Interfaces Intel® FPGA IP. If the Pin Type is set to Output, the strobe_out signal is used. If the Pin Type is set to Bidirectional the strobe_io signal is used. The Use Separate Strobes parameter forces the use of the strobe_out signal with a Bidirectional Pin Type.
strobe_out_n/strobe_io_n Output/Bidirectional 1 Negative output strobe from PHY Lite for Parallel Interfaces Intel® FPGA IP.

This is used if the Strobe Configuration is set to Differential or Complementary.

If the Pin Type is set to Output, the strobe_out_n signal is used. If the Pin Type is set to Bidirectional, the strobe_io_n signal is used. The Use Separate Strobes parameter forces the use of the strobe_out_n signal with a Bidirectional Pin Type.