Arria® 10 FPGA Developer Center
The FPGA Developer Center is organized into industry-standard stages, which provides you with various resources to complete your Intel® FPGA design. Each design step is detailed in the expandable sub-sections with links that allow you to select and move between the various Generation 10 device series.
1. Device Information
Documentation
2. Interface Protocols
Documentation
User Guides / Application Notes |
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Other Serial IP |
AN 753: Intel FPGA JESD204B IP Core and ADI AD6676 Hardware Checkout Report |
AN 749: Intel FPGA JESD204B IP Core and ADI AD9144 Hardware Checkout Report |
User Guides |
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Digital Signal Processing (DSP) |
Design Examples | |
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External Memory Interface | Version |
15.0 |
Design Example User Guides |
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Ethernet |
Intel FPGA Low Latency Ethernet 10G MAC Design Example User Guide for Intel Arria 10 Devices |
Design Example User Guides |
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Other Serial IP |
Intel FPGA JESD204B Design Example User Guide for Intel Arria 10 Devices |
Intel FPGA Wiki |
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External Memory Interface |
Intel Arria 10 and Intel Stratix 10 EMIF Hardware Debug Guide |
3. Design Planning
Documentation
User Guides / Device Overview / Device Datasheet / Application Notes |
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Platform Designer User Guide (Intel Quartus Prime Pro Edition) |
Reference Designs |
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4. Design Entry
Documentation
The Intel Quartus Prime Pro Edition software offers a mature synthesizer that allows you to enter your designs with maximum flexibility. If you are new to these languages, you can use online examples or built-in templates to get you started.
The Intel Quartus Prime Pro Edition software offers Verilog and VHDL templates of frequently used structures. For more information on using these template, refer to the "Using Provided HDL Templates" section of the Intel Quartus Prime Pro Edition Handbook.
The Intel Quartus Prime design software also comes with Intel® High Level Synthesis Compiler which synthesizes a C++ function into an RTL implementation that is optimized for Intel FPGA products.
User Guides / Device Overview / Device Datasheet / White Paper |
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Design Recommendations User Guide: Intel Quartus Prime Pro Edition |
Platform Designer User Guide: Intel Quartus Prime Pro Edition |
Applying the Benefits of Network on a Chip Architecture to FPGA System Design |
5. Simulation and Verification
Documentation
6. Implementation and Optimization
Documentation
7. Timing Analysis
Documentation
User Guides / Device Overview / Device Datasheet / Application Notes |
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AN 366: Understanding I/O Output Timing for Intel FPGA Devices |
AN 433: Constraining and Analyzing Source-Synchronous Interfaces |
8. On-Chip Debug
Documentation
Intel FPGA Wiki |
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Explore Other Developer Centers
For other design guidelines, visit the following Developer Centers:
- Board Developer Center - Contains detailed guidelines and considerations for high-speed PCB designs with Altera® FPGAs and SoC FPGAs.
- Embedded Software Developer Center - Contains guidance on how to design in an embedded environment with SoC FPGAs.
- FPGA Developer Center - Contains resources to complete your Altera® FPGA design.