AN 693: Remote Hardware Debugging over TCP/IP for Altera SoC

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ID 723698
Date 5/11/2015
Public
Document Table of Contents
Document Table of Contents x
1. Remote Hardware Debugging over TCP/IP for Altera SoC
1. Remote Hardware Debugging over TCP/IP for Altera SoC x
1.1. TCP/IP Communication Channel 1.2. Use-Case Scenarios 1.3. Software Requirements 1.4. Hardware Requirements 1.5. System Components 1.6. How to Remote Debug with the SignalTap II Logic Analyzer 1.7. Appendix 1.8. Document Revision History
1.5. System Components x
1.5.1. The Processor 1.5.2. SLD Hub Controller 1.5.3. SLD Hub
1.5.3. SLD Hub x
1.5.3.1. Supported System Debugging Tools
1.6. How to Remote Debug with the SignalTap II Logic Analyzer x
1.6.1. Example Implementation of Remote Debugging on an Altera SoC (5CSXSoC)
1. Remote Hardware Debugging over TCP/IP for Altera SoC

1. Remote Hardware Debugging over TCP/IP for Altera SoC

You can perform remote debugging of your system with System Console. Debug equipment deployed in the field through an existing TCP/IP connection. Run a network stack on either a Nios II processor or a hard processor system (HPS) and piggyback on an existing remote administration setup. This application note focuses on the case of using an Altera SoC.

Section Content
TCP/IP Communication Channel
Use-Case Scenarios
Software Requirements
Hardware Requirements
System Components
How to Remote Debug with the SignalTap II Logic Analyzer
Appendix
Document Revision History

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