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6.1. Synthesis Tool
6.2. Device Resource Reports
6.3. Quartus® Prime Message
6.4. Design Assistant Design Rule Checking
6.5. Timing Constraints and Analysis
6.6. Area and Timing Optimization
6.7. Preserving Performance and Reducing Compilation Time
6.8. Designing with Hyperflex®
6.9. Simulation
6.10. Power Analysis
6.11. Design Implementation, Analysis, Optimization and Verification Revision History
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Ixiasoft
5.1. Early Board Planning
System information related to the FPGA is planned early in the design process, before designers have completed the design in the Quartus® Prime software. Early planning allows the FPGA team to provide early information to PCB board and system designers.