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6.1. Synthesis Tool
6.2. Device Resource Reports
6.3. Quartus® Prime Message
6.4. Design Assistant Design Rule Checking
6.5. Timing Constraints and Analysis
6.6. Area and Timing Optimization
6.7. Preserving Performance and Reducing Compilation Time
6.8. Designing with Hyperflex®
6.9. Simulation
6.10. Power Analysis
6.11. Design Implementation, Analysis, Optimization and Verification Revision History
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2.1. Design Specification
Create detailed design specifications that define the system before you create your logic design or complete your system design, by performing the following:
- Specify the I/O interfaces (including high-speed serial, memory interfaces, MIPI D-PHY) for the FPGA
- Identify the different clock domains
- Include a block diagram of basic design functions
- Include intellectual property (IP) blocks
- Create a functional verification/test plan
- Consider a common design directory structure
- Consider the use of a Revision Control System (RCS) for checking in and out files so, development time is easier.
Create a functional verification plan to ensure the team knows how to verify the system. Creating a test plan at this stage can also help you design for testability and design for manufacturability. You might require the ability to validate all the design interfaces.
If your design includes multiple designers, it is useful to consider a common design directory structure. This eases the design integration stages.