Device Design Guidelines: Agilex™ 5 FPGAs and SoCs

ID 813741
Date 4/01/2024
Public
Document Table of Contents

3.1.9. Hard Processor System

Agilex™ 5 supports three variants of devices:

  • No Hard Processor System (HPS)
  • Dual-core HPS: 2x Arm* Cortex* -A55 cores
  • Quad-core HPS: 2x Arm* Cortex* -A55 cores and 2x Arm* Cortex* -A76 cores