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Ixiasoft
Visible to Intel only — GUID: ngg1685575806070
Ixiasoft
6.8. Designing with Hyperflex®
Number |
Done? |
Checklist Item |
---|---|---|
1 |
Use Hyperflex® feature to optimize your design and achieve enhanced performance. |
Hyperflex® core architecture adds registers to both the interconnect routing and the inputs of all major functional blocks in the FPGA. These added registers, called Hyper-Registers, are different from conventional registers. Conventional registers are present only in the adaptive logic modules (ALMs). Hyper-Registers can help to achieve significant core performance improvement.
To achieve this enhanced performance, you must optimize your designs using the following steps:
- Hyper-Retiming
- Hyper-Pipelining
- Hyper-Optimization
For more information about high performance design, refer to the Intel FPGA Technical Training website.