Device Design Guidelines: Agilex™ 5 FPGAs and SoCs

ID 813741
Date 4/01/2024
Public
Document Table of Contents

4.1.3.3. Clock Feedback Mode

Table 22.  Clock Feedback Mode

Number

Done?

Checklist Item

1

 

Ensure you select the correct PLL feedback compensation mode.

Agilex™ 5 PLLs support six different clock feedback modes, however the fabric-feeding IOPLLs only support three of them. For more information about the supported feedback modes, refer to Clocking and PLL User Guide: Agilex™ 5 FPGAs and SoCs .