Agilex™ 7 FPGAs and SoCs Device Data Sheet: M-Series

ID 769310
Date 7/15/2024
Public
Document Table of Contents

R-Tile Transmitter Specifications

Table 51.  R-Tile Transmitter Specifications For specification status, see the Data Sheet Status table
Symbol/Description Condition All Transceiver Speed Grades Unit
Min Typ Max
Supported I/O standards PCIe* High-Speed Differential I/O
CXL High-Speed Differential I/O
Differential on-chip termination resistors PCIe* 88 80 100 120
CXL88 80 100 120
Differential peak-to-peak voltage for full swing PCIe* 2.5 GT/s 800 1,200 mV
PCIe* 5.0 GT/s 800 1,200 mV
PCIe* 8.0 GT/s 800 1,300 mV
PCIe* 16.0 GT/s 800 1,300 mV
PCIe* 32.0 GT/s 800 1,300 mV
CXL 8.0 GT/s 800 1,300 mV
CXL 16.0 GT/s 800 1,300 mV
CXL 32.0 GT/s 800 1,300 mV
Differential peak-to-peak voltage during EIEOS PCIe* 8.0 GT/s, 16.0 GT/s, and 32.0 GT/s 250 mV
CXL 8.0 GT/s, 16.0 GT/s, and 32.0 GT/s 250 mV
Lane-to-lane output skew PCIe* 2.5 GT/s 2.5 ns
PCIe* 5.0 GT/s 2 ns
PCIe* 8.0 GT/s 1.5 ns
PCIe* 16.0 GT/s 1.25 ns
PCIe* 32.0 GT/s 1.25 ns
CXL 8.0 GT/s 1.5 ns
CXL 16.0 GT/s 1.25 ns
CXL 32.0 GT/s 1.25 ns
88 100ohms (Typical) aligned to Base spec.