Agilex™ 7 FPGAs and SoCs Device Data Sheet: M-Series

ID 769310
Date 7/15/2024
Public
Document Table of Contents

HPS Clock Performance

Table 65.  Maximum HPS Clock Frequencies For specification status, see the Data Sheet Status table
Performance VCCL_HPS (V) MPU Frequency (MHz) L3 Frequency (MHz) (l3_main_free_clk) MPFE Frequency (MHz)
–1 speed grade Fixed: 0.95 1,500 400 400
667
SmartVID 1,350 400 400
667
–2 speed grade SmartVID 1,200 400 334
600
–3 speed grade SmartVID 1,000 400 300
534