Agilex™ 7 FPGAs and SoCs Device Data Sheet: M-Series

ID 769310
Date 7/15/2024
Public
Document Table of Contents

Document Revision History for the Intel Agilex 7 FPGAs and SoCs Device Data Sheet: M-Series

Document Version Changes
2023.12.15
  • Added AGM 039 R31B package in the Data Sheet Status for Intel Agilex 7 FPGAs and SoCs M-Series table.
  • Updated the CONF_DONE and INIT_DONE signals in the General Configuration Timing Diagram and added a note for the signals.
  • Included specifications for Input Clock Frequency Source from IO Clock Input in I/O PLL Specifications table.
  • Updated Parameter: Input Clock Frequency to Input Clock Frequency Source from Core Clock Input or Reference Clock Input.
  • Updated the Recommended Operating Conditions table.
    • Added IFUSEWR symbol.
    • Updated the extended grade minimum TJ specifications.
    • Added clarity for the industrial grade minimum TJ specifications.
  • Updated the maximum value of V CCFUSEWR_SDM in the Absolute Maximum Ratings table.
  • Updated VCCIO_PIO footnote in the following tables:
    • Recommended Operating Conditions
    • GPIO-B Single-Ended SSTL, HSTL, HSUL, POD and LVSTL I/O Reference Voltage Specifications
    • GPIO-B Single-Ended LVSTL I/O Standards Specifications
    • GPIO-B Differential SSTL, HSTL, and HSUL I/O Standards Specifications
    • GPIO-B Differential POD I/O Standards Specifications
    • GPIO-B Differential LVSTL I/O Standards Specifications
  • Added LVSTL11, LVSTL105, and LVSTL700 I/O Standards in GPIO-B Single-Ended SSTL, HSTL, HSUL, and POD I/O Reference Voltage table.
  • Removed 1.1 V support for LVSTL700 standard in the Table: GPIO-B Single-Ended SSTL, HSTL, HSUL, POD and LVSTL I/O Reference Voltage Specifications and GPIO-B Single-Ended LVSTL I/O Standards Specifications.
  • Updated the VOD maximum specifications for True Differential Signaling -1.3V (Transmitter and Receiver) I/O Standard in GPIO-B Differential I/O Standards Specifications table.
  • Added SLVS-400 support and footnote in LVDS SERDES Specifications table.
  • Updated the ideality factors when using lower injection current (two-currents) in Remote Temperature Diode section.
  • Updated note in Voltage Sensor Specifications section.
  • Updated supported –2 transceiver speed grade data rate for NRZ in the F-Tile FGT Transmitter and Receiver Data Rate Performance.
  • Added footnote in F-Tile FGT Electrical Compliance List table.
  • Removed XSR support in CEI 4.0/5.0 specifications in the F-Tile FHT Electrical Compliance List table.
  • Updated the VRX-DIFF-PKPK specifications F-Tile FGT Receiver Electrical Specifications table.
  • Updated the Programmable IOE Delay section.
    • Removed -I1V, -I2V, and -I3V speed grades.
    • Updated IOE delay in all speed grades.
2023.07.13 Removed the note about restricted support for M-Series FPGAs.
2023.05.05 Initial release.