Quartus® Prime Pro Edition Settings File Reference Manual

ID 683296
Date 7/08/2024
Public
Document Table of Contents

SHIFT_REG_TO_RAM_INFERENCE_MIN_OUTPUT_REG_EXCLUDED

Specify minimum number of shift register output layers excluded from being converted into a RAM-based shift register implementation.

Type

Integer

Device Support

  • Intel Agilex® 5
  • Intel Agilex® 7
  • Arria® 10
  • Cyclone® 10 GX
  • Stratix® 10

Notes

This assignment supports Fitter wildcards.

Syntax

set_global_assignment -name SHIFT_REG_TO_RAM_INFERENCE_MIN_OUTPUT_REG_EXCLUDED -entity <entity name> <value>
set_instance_assignment -name SHIFT_REG_TO_RAM_INFERENCE_MIN_OUTPUT_REG_EXCLUDED -to <to> -entity <entity name> <value>

Example

set_global_assignment -name SHIFT_REG_TO_RAM_INFERENCE_MIN_OUTPUT_REG_EXCLUDED 3 -to ff_in_shiftreg